Data Sheet
AS3560
Class-G Stereo Headphone Amplifier
1 General Description
The AS3560 is a Class-G stereo headphone amplifier optimized for
usage within portable devices. The Class-G supply rail adaptation is
implemented by an integrated DCDC buck converter that takes its
input directly from the battery. The continuous adaption of supply
rails is done according to the input signal swing and load conditions.
This architecture implements significant power savings compared to
traditional Class-AB amplifiers.
An I2C control interface is implemented for a 32-step volume control.
The integrated charge pump generates a symetric negative supply
for true ground output signal levels without the need of output
coupling capacitors.
A supervisory circuit is included for overtemperature and short-
circuit protection.
Differential inputs together with output ground sensing guarantees
very low noise sensitivity.
2 Key Features
G-Class amplifier with integrated DCDC buck converter
- 2x30mW, 0.02% THD @16Ω
- >100dB SNR @1V
rms
Charge pump for true ground output without coupling capacitors
Direct battery connection with wide supply range: 2.3V to 5.5V
Low power consumption optimized for battery operation
- 1 mA quiescent current with both channels enabled
- <5 µA shutdown current
Fully Differential Inputs reduce system noise
- Also configurable as Single-Ended Inputs
SGND pin for ground sensing and ground feedback minimizes
sensitivity to interference
I2C control interface
- volume control with 32 gain steps, -59 to +4dB, <-80dB mute
- Channel independent enable control
Current and Temperature Supervisor
Package: 0.4 mm Pitch WL-CSP (1.615x1.615mm)
3 Applications
Mobile Phones
Portable Navigation DevicesMedia Devices
Media Devices
Figure 1. AS3560 Block Diagram
&*&
*
$
#
#
+)
*
#
*
!"
*
*
*
*
&'()
%
www.austriamicrosystems.com/AS3560
Revision 0.06 - preliminary
1 - 16
AS3560
Data Sheet - C o n t e n t s
Contents
1 General Description
2 Key Features
3 Applications
.................................................................................................................................................................. 1
............................................................................................................................................................................ 1
.............................................................................................................................................................................. 1
....................................................................................................................................................................... 3
................................................................................................................................................................................... 3
4 Pin Assignments
4.1 Pin Descriptions
5 Absolute Maximum Ratings
6 Electrical Characteristics
8 Detailed Description
9 Register Definition
...................................................................................................................................................... 4
.......................................................................................................................................................... 5
........................................................................................................................................... 7
7 Detailed Operating Characteristics
8.1 I2C Control Interface
9.1 Register Overview
................................................................................................................................................................. 8
............................................................................................................................................................................ 8
................................................................................................................................................................................ 9
............................................................................................................................................................. 9
.................................................................................................................................................................... 9
9.2 Detailed Register Descriptions
10 Application Information
10.1 GND Connections
10.2 External Elements
10.3 Software Shutdown
..........................................................................................................................................................11
............................................................................................................................................................................ 11
............................................................................................................................................................................ 11
.......................................................................................................................................................................... 11
11 Package Drawings and Markings
12 Ordering Information
......................................................................................................................................... 12
............................................................................................................................................................. 14
www.austriamicrosystems.com/AS3560
Revision 0.06 - preliminary
2 - 16
AS3560
Data Sheet - P i n A s s i g n m e n t s
4 Pin Assignments
Figure 2. Pin Assignments (Top View)
HPVDD
AVDD
CPN
CPP
HPVSS
SW
Top View
DCDC
Buck
INRP
INRN
INLP
INLN
SCL
SDA
Charge
Pump
HPL
A1
SW
A2
AVDD
A3
HPL
A4
INLN
B1
AGND
B2
CPP
B3
HPVDD
B4
INLP
AS3560
ground sense
HPR
SGND
C1
CPN
C2
HPVSS
C3
SGND
C4
INRP
I2C
AGND
Supervisor
(Current & Temp)
D1
SDA
D2
SCL
D3
HPR
D4
INRN
4.1 Pin Descriptions
Table 1. Pin Descriptions
Pin Name
SW
AVDD
HPL
INLN
AGND
CPP
HPVDD
INLP
CPN
HPVSS
SGND
INRP
SDA
SCL
HPR
INRN
Pin Number
A1
A2
A3
A4
B1
B2
B3
B4
C1
C2
C3
C4
D1
D2
D3
D4
Buck converter switching node
Primary power supply for device
Left channel headphone amplifier output
Inverting left input for differential signals;
connect to left input signal through 2.2µF capacitor for single-ended input applications
Main Ground for headphone amplifiers, DC/DC converter, and charge pump
Charge pump positive flying cap; connect to 2.2µF flying capacitor
Power supply for headphone amplifier (DC/DC output node)
Non-inverting left input for differential signals;
connect to ground through 2.2µF capacitor for single-ended input applications
Charge pump negative flying cap; connect to 2.2µF flying capacitor
Charge pump output; connect 2.2µF capacitor to GND
Ground sense; connect to headphone jack ground
Non-Inverting right input for differential signals;
connect to right input signal through 2.2µF capacitor for single-ended input applications
I²C Data; 1.8V logic compliant
I²C Clock; 1.8V logic compliant
Right channel headphone amplifier output
Inverting right input for differential signals;
connect to ground through 2.2µF capacitor for single-ended input applications
Description
www.austriamicrosystems.com/AS3560
Revision 0.06 - preliminary
3 - 16
AS3560
Data Sheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in
Table 2
may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in
Operating Conditions on page 5
is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability
.
Table 2. Absolute Maximum Ratings
Parameter
Supply voltage, AVDD
Amplifier supply voltage, HPVDD
SGND
Differential Input voltage
Input voltage at SCL, SDA
Breakdown voltage at amplifier outputs
Input current (latchup immunity)
Continuous Power Dissipation
Continuous power dissipation
Continuous power dissipation derating factor
Electrostatic Discharge
ESD HBM
ESD MM
ESD CDM
Temperature Range and Storage Conditions
Junction Temperature
Storage Temperature Range
Body Temperature during Soldering
1. Depending on actual PCB layout and PCB used
2. P
DERATE
derating factor changes the total continuous power dissipation (P
T
) if the ambient temperature is not 70 C.
Therefore for e.g. TAMB=85 C calculate P
T
at 85ºC = P
T
- P
DERATE
* (85
º
C - 70ºC)
º
º
Min
-0.3
-0.3
-0.3
HPVSS
-0.3V
-0.3
HPVSS
-0.5
Max
5.5
2.0
0.3
HPVDD
+0.3V
7.0
HPVDD
+0.5
±200
TBD
TBD
±2
±100
Units
V
V
V
V
V
V
mA
mW
mW/ºC
KV
V
V
Comments
for 1 ms peaks
P
T
1
2
P
DERATE
Norm: MIL 883 E Method 3015
Norm: JEDEC JESD 22-C101C
Norm: JEDEC JESD 22-A115-A level A
internally limited (overtemperature protection)
auto shutdown at 140 ºC
according to IPC/JEDEC J-STD-020C
-4
±500
+150
-55
+125
+260
ºC
ºC
ºC
www.austriamicrosystems.com/AS3560
Revision 0.06 - preliminary
4 - 16
AS3560
Data Sheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
AVDD=3.6V, T
A
=25 ºC, Rload = 15 + 32
Ω
(headphone + external protection resistor), unless otherwise specified.
Table 3. Operating Conditions
Symbol
AVDD
Parameter
Supply Voltage
Rail Voltages HPVDD, HPVSS
(Buck and CP output)
I
DD
I
SD
I
S
T
A
t
WAKEUP
Input Interfaces
V
IL
V
IH
V
HYST
Z
IN
HPA Output
V
OUT
Output Voltage
Output DC Offset
Z
OUT
Output Impedance
Rload=16Ω, THD+N=1%, L+R in phase
Rload=32Ω, THD+N=1%, L+R in phase
Both channels enabled
<40 KHz
In HiZ mode
when SWS = 0, HiZ_L = HiZ_R = 1,
device in HI-Z mode
ext. cap, 15Ω series resistor
ext cap, directly connected
SWS = 1
when SWS = 1, device disabled
700mV
rms
, 1KHz
Gain 0dB @217 Hz
1V
rms
, 1KHz
>16Ω (Headset)
>10kΩ (Lineout)
90
100
60
80
105
-0.3
0.01
8
3.6
0.02
6 MHz
36 MHz
Voltage applied to Output; HPR, HPL
C
LOAD
Z
OOT,SD
Audio Parameters
THD+N
PSRR
SNR
Total Harmonic Distortion + Noise
Power Supply Rejection Ratio
Signal-to-Noise Ratio
Channel Separation
%
dB
dB
dB
dB
Capacitive Load
Output impedance in shutdown
Voltage applied to Output; HPR, HPL
-1.8
0.8
5
10
500
75
1.8
100
100
0.7
1.0
500
V
rms
V
rms
µV
kΩ
Ω
Ω
V
nF
pF
kΩ
V
Low-level input voltage (SCL, SDA)
High-level input voltage (SCL, SDA)
Hysteresis (SCL, SDA)
Input Impedance Line Inputs
Differential
Single Ended
AVDD 2.9V to 4.5V
AVDD 2.9V to 4.5V
1.2
50
20
10
100
200
0.6
V
V
mV
kΩ
kΩ
Quiescent Current
Shutdown Current
Supply Current
Operating Temperature Range
Wakeup Time
both channels enabled, no audio signal
SW shutdown
Output: 2x100µW @ 3dB Crest Factor
Output: 2x500µW @ 3dB Crest Factor
Output: 2x1mW @ 3dB Crest Factor
-30
Conditions
Min
2.3
0.8
1.15
1.7
0.9
1.25
1.8
1.1
1
2.0
3.1
4.0
25
10
Typ
Max
4.8
1.0
1.35
1.9
1.5
5
3.5
5.5
7.5
+85
15
Units
V
V
V
V
mA
uA
mA
mA
mA
ºC
ms
General Operating Conditions
www.austriamicrosystems.com/AS3560
Revision 0.06 - preliminary
5 - 16
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
