Total V+ Current .................................................................50mA
Total GND Current ...........................................................100mA
Continuous Power Dissipation
QSOP (derate 9.5mW/°C over T
A
= +70°C) ...............761.9mW
TQFN (derate 20.8mW/°C over T
A
= +70°C) .........1666.7mW
Operating Temperature Range ......................... -40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) ................................. +300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
DC Electrical Characteristics
(V+ = +1.71V to +5.5V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, T
A
= +25°C.) (Note 1)
PARAMETER
Operating Supply Voltage
Power-On Reset Voltage
Standby Current (Interface Idle)
Supply Current
(Interface Running)
Input High-Voltage
SDA, SCL, AD0, AD2,
RST,
I0–I7
Input Low-Voltage
SDA, SCL, AD0, AD2,
RST,
I0–I7
Input Leakage Current
SDA, SCL, AD0, AD2,
RST,
I0–I7
Input Capacitance
SDA, SCL, AD0, AD2,
RST,
I0–I7
V+ = +1.71V, I
SINK
= 5mA (QSOP)
V+ = +1.71V, I
SINK
= 5mA (TQFN)
V+ = +2.5V, I
SINK
= 10mA (QSOP)
Output Low Voltage
O8–O15
V
OL
V+ = +2.5V, I
SINK
= 10mA (TQFN)
V+ = +3.3V, I
SINK
= 15mA (QSOP)
V+ = +3.3V, I
SINK
= 15mA (TQFN)
V+ = +5V, I
SINK
= 20mA (QSOP)
V+ = +5V, I
SINK
= 20mA (TQFN)
V+ = +1.71V, I
SOURCE
= 2mA
Output High Voltage
O8–O15
Output Low-Voltage SDA
Output Low-Voltage
INT
Port Input Pullup Resistor
V
OH
V+ = +2.5V, I
SOURCE
= 5mA
V+ = +3.3V, I
SOURCE
= 5mA
V+ = +5V, I
SOURCE
= 10mA
V
OLSDA
V
OLINT
R
PU
I
SINK
= 6mA
I
SINK
= 5mA
25
130
40
SYMBOL
V
+
V
POR
I
STB
I
+
V
IH
V
IL
I
IH
, I
IL
V+ falling
SCL and SDA and other digital inputs at V+
f
SCL
= 400kHz; other digital inputs at V+
V+ < 1.8V
V+ ≥ 1.8
V+ < 1.8V
V+ ≥ 1.8
SDA, SCL, AD0, AD2,
RST,
I0–I7 at V+ or
GND
-0.2
10
90
90
110
110
130
130
140
140
V+ - 250 V+ - 30
V+ - 360 V+ - 70
V+ - 260 V+ - 100
V+ - 360 V+ - 120
250
250
55
mV
mV
kW
mV
180
230
210
260
230
280
250
300
mV
0.8 x V+
0.7 x V+
0.2 x V+
0.3 x V+
+0.2
0.6
23
CONDITIONS
T
A
= -40°C to +125°C
MIN
1.71
TYP
MAX
5.50
1.6
1.9
55
UNITS
V
V
µA
µA
V
V
µA
pF
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Maxim Integrated
│
2
MAX7324
I
2
C Port Expander with
Eight Push-Pull Outputs and Eight Inputs
Port and Interrupt
INT
Timing Characteristics
(V+ = +1.71V to +5.5V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, T
A
= +25°C.) (Note 1)
PARAMETER
Port-Output Data Valid
Port-Input Setup Time
Port-Input Hold Time
INT
Input Data Valid Time
INT
Reset Delay Time from STOP
INT
Reset Delay Time from
Acknowledge
SYMBOL
t
PPV
t
PSU
t
PH
t
IV
t
IP
t
IR
CL
≤ 100pF
CONDITIONS
C
L
≤ 100pF
C
L
≤ 100pF
C
L
≤ 100pF
C
L
≤ 100pF
C
L
≤ 100pF
MIN
0
4
TYP
MAX
4
UNITS
µs
µs
µs
4
4
4
µs
µs
µs
Timing Characteristics
(V+ = +1.71V to +5.5V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, T
A
= +25°C.) (Note 1)
PARAMETER
Serial-Clock Frequency
Bus Free Time Between a STOP
and a START Condition
Hold Time (Repeated) START
Condition
Repeated START Condition
Setup Time
STOP Condition Setup Time
Data Hold Time
Data Setup Time
SCL Clock Low Period
SCL Clock High Period
Rise Time of Both SDA and SCL
Signals, Receiving
Fall Time of Both SDA and SCL
Signals, Receiving
Fall Time of SDA Transmitting
Pulse Width of Spike Suppressed
Capacitive Load for Each Bus
Line
RST
Pulse Width
RST
Rising to START Condition
Setup Time
SYMBOL
f
SCL
t
BUF
t
HD,STA
t
SU,STA
t
SU,STO
t
HD,DAT
t
SU,DAT
t
LOW
t
HIGH
t
R
t
F
t
F,TX
tSP
C
b
t
W
t
RST
(Notes 3, 4)
(Notes 3, 4)
(Notes 3, 4)
(Note 5)
(Note 3)
500
1
(Note 2)
100
1.3
0.7
20 +
0.1C
b
20 +
0.1C
b
20 +
0.1C
b
50
400
300
300
250
1.3
0.6
0.6
0.6
0.9
CONDITIONS
MIN
TYP
MAX
400
UNITS
kHz
µs
µs
µs
µs
µs
ns
µs
µs
ns
ns
ns
ns
pF
ns
µs
Note 1: All parameters are tested at T
A
= +25°C. Specifications over temperature are guaranteed by design.
Note 2: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V
IL
of the SCL signal) to bridge
the undefined region of SCL's falling edge.
Note 3: Guaranteed by design.
Note 4: C
b
= total capacitance of one bus line in pF. t
R
and t
F
measured between 0.3 x V+ and 0.7 x V+. I
SINK
≤ 6mA.
Note 5: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
www.maximintegrated.com
Maxim Integrated
│
3
MAX7324
I
2
C Port Expander with
Eight Push-Pull Outputs and Eight Inputs
Typical Operating Characteristics
(T
A
= +25°C, unless otherwise noted.)
STANDBY CURRENT
vs. TEMPERATURE
MAX7324 toc01
1.8
1.6
STANDBY CURRENT (A)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
V+ = +1.71V
V+ = +2.5V
V+ = +3.3V
f
SCL
= 0kHz
f
SCL
= 400kHz
V+ = +5.0V
50
SUPPLY CURRENT (A)
40
30
20
10
0
V+ = +5.0V
V+ = +3.3V
V+ = +2.5V
V+ = +1.71V
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (
°
C)
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (
°
C)
MAX7324 toc03
0.15
0.10
0.05
0
V+ = +3.3V
I
SINK
= 15mA
OUTPUT-VOLTAGE HIGH (V)
OUTPUT-VOLTAGE LOW (V)
0.20
V+ = +5.0V
I
SINK
= 20mA
5
4
3
2
1
0
V+ = +3.3V
I
SOURCE
= 5mA
V+ = +5.0V
I
SOURCE
= 10mA
V+ = +2.5V I
SOURCE
= 5mA
V+ = +1.71V I
SOURCE
= 2mA
V+ = +1.71V
V+ = +2.5V
I
SINK
= 5mA
I
SINK
= 10mA
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (
°
C)
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (
°
C)
Pin Description
PIN
QSOP
1
2
3, 21
4–11
12
13–20
22
23
24
—
TQFN
22
23
24, 18
1–8
9
10–17
19
20
21
EP
NAME
INT
RST
AD2, AD0
I0–I7
GND
08–015
SCL
SDA
V+
EP
FUNCTION
Active-Low Interrupt Output.
INT
is an open-drain output.
Active-Low Reset Input. Drive
RST
low to clear the 2-wire interface.
Address Inputs. Select device slave address with AD0 and AD2. Connect AD0 and AD2 to
either GND, V+, SCL, or SDA to give four logic combinations (see Tables 2 and 3).
Input Ports. I0 to I7 are CMOS-logic inputs.
Ground
Output Ports. O8–O15 are push-pull outputs rated at 20mA.
I
2
C-Compatible Serial Clock Input
I
2
C-Compatible Serial Data I/O
Positive Supply Voltage. Bypass V+ to GND with a ceramic capacitor of at least 0.047µF.
Exposed Paddle. Connect exposed pad to GND.
www.maximintegrated.com
Maxim Integrated
│
4
MAX7324 toc04
0.25
OUTPUT-VOLTAGE LOW
vs. TEMPERATURE
6
OUTPUT-VOLTAGE HIGH
vs. TEMPERATURE
MAX7324 toc02
2.0
60
SUPPLY CURRENT
vs. TEMPERATURE
MAX7324
I
2
C Port Expander with
Eight Push-Pull Outputs and Eight Inputs
The MAX7324 is set to two of 32 I
2
C slave addresses
(see Tables 2 and 3) using address select inputs AD0
and AD2, and is accessed over an I
2
C serial interface
up to 400kHz. The eight outputs and eight inputs have
different slave addresses. The eight push-pull outputs
have the 101xxxx addresses and the eight inputs have
the addresses with 110xxxx. The
RST
input clears the
serial interface in case of a bus lockup, terminating any
serial transaction to or from the MAX7324.
The input ports offer latching transition detection
feature. All input ports are continuously monitored for
changes. An input change sets 1 of 8 flag bits that
identify the changed input(s). All flags are cleared upon
a subsequent read or write transaction to the MAX7324.
Detailed Description
MAX7324–MAX7327 Family Comparison
The MAX7324–MAX7327 family consists of four
pin-compatible, 16-port expanders that integrate the
function of the MAX7320 and one of either the MAX7319,
MAX7321, MAX7322, or MAX7323.
Functional Overview
The MAX7324 is a general-purpose port expander
operating from a +1.71V to +5.5V supply with eight
push-pull outputs and eight CMOS input ports that are
overvoltage protected to +6V.
Table 1. MAX7319–MAX7329 Family Comparison
PART
I
2
C
INPUT
SLAVE
INPUTS INTERRUPT
ADDRESS
MASK
OPEN-
DRAIN
OUTPUTS
PUSH-
PULL
OUTPUTS
CONFIGURATION
16-PORT EXPANDERS
8 inputs and 8 push-pull outputs version:
8 input ports with programmable latching transition
detection interrupt and selectable pullups.
MAX7324
8
Yes
—
8
8 push-pull outputs with selectable default logic
levels.
Offers maximum versatility for automatic input
monitoring. An interrupt mask selects which inputs
cause an interrupt on transitions, and transition flags
identify which inputs have changed (even if only for
a transient) since the ports were last read.
8 I/O and 8 push-pull outputs version:
8 open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
8 push-pull outputs with selectable default logic
levels
MAX7325
Up to 8
—
Up to 8
8
Open-drain outputs can level shift the logic-high
state to a higher or lower voltage than V+ using
external pullup resistors, but pullups draw current
when output is low. Any open-drain port can be used
as an input by setting the open-drain output to logic-
high. Transition flags identify which open-drain port
inputs have changed (even if only for a transient)
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