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74VHCT138A 3-to-8 Decoder/Demultiplexer
May 2007
74VHCT138A
3-to-8 Decoder/Demultiplexer
Features
■
High Speed: t
PD
=
7.6ns (Typ.) at V
CC
=
5V
■
Low power dissipation: I
CC
=
4µA (Max.) at T
A
=
25°C
■
Power down protection is provided on all inputs and
tm
General Description
The VHCT138A is an advanced high speed CMOS
3-to-8 DECODER fabricated with silicon gate CMOS
technology. It achieves the high speed operation similar
to equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
When the device is enabled, 3 Binary Select inputs
(A
0
, A
1
and A
2
) determine which one of the outputs
(O
0
–O
7
) will go LOW. When enable input E
3
is held
LOW or either E
1
or E
2
is held HIGH, decoding function
is inhibited and all outputs go HIGH. E
3
, E
1
and E
2
inputs
are provided to ease cascade connection and for use as
an address decoder for memory systems. Protection
circuits ensure that 0V to 7V can be applied to the input
pins without regard to the supply voltage and to the out-
put pins with V
CC
=
0V. These circuits prevent device
destruction due to mismatched supply and input/output
voltages. This device can be used to interface 3V to 5V
systems and two supply systems such as battery
backup.
outputs
■
Pin and function compatible with 74HCT138
Ordering Information
Order Number
74VHCT138AM
74VHCT138ASJ
74VHCT138AMTC
Package
Number
M16A
M16D
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
嵌入式系统
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