19-2776; Rev 2; 12/03
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
General Description
The MAX5886 is an advanced, 12-bit, 500Msps digital-
to-analog converter (DAC) designed to meet the
demanding performance requirements of signal synthe-
sis applications found in wireless base stations and
other communications applications. Operating from a
single 3.3V supply, this DAC offers exceptional dyna-
mic performance such as 76dBc spurious-free dynamic
range (SFDR) at f
OUT
= 30MHz. The DAC supports
update rates of 500Msps and a power dissipation of
only 230mW.
The MAX5886 utilizes a current-steering architecture,
which supports a full-scale output current range of 2mA
to 20mA, and allows a differential output voltage swing
between 0.1V
P-P
and 1V
P-P
.
The MAX5886 features an integrated 1.2V bandgap ref-
erence and control amplifier to ensure high accuracy
and low noise performance. Additionally, a separate
reference input pin enables the user to apply an exter-
nal reference source for optimum flexibility and to
improve gain accuracy.
The digital and clock inputs of the MAX5886 are
designed for differential low-voltage differential signal
(LVDS)-compatible voltage levels. The MAX5886 is
available in a 68-pin QFN package with an exposed
paddle (EP) and is specified for the extended industrial
temperature range (-40°C to +85°C).
Refer to the MAX5887 and MAX5888 data sheets for
pin-compatible 14- and 16-bit versions of the MAX5886.
♦
500Msps Output Update Rate
♦
Single 3.3V Supply Operation
♦
Excellent SFDR and IMD Performance
SFDR = 76dBc at f
OUT
= 30MHz (to Nyquist)
IMD = -85dBc at f
OUT
= 10MHz
ACLR = 70dB at f
OUT
= 61MHz
♦
2mA to 20mA Full-Scale Output Current
♦
Differential, LVDS-Compatible Digital and Clock
Inputs
♦
On-Chip 1.2V Bandgap Reference
♦
Low 130mW Power Dissipation
♦
68-Pin QFN-EP Package
IT
TION K
VALUA
E
BLE
AVAILA
Features
MAX5886
Ordering Information
PART
MAX5886EGK
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
68 QFN-EP*
*EP
= Exposed paddle.
Pin Configuration
DGND
DGND
DV
DD
B0N
B1N
B2N
B3N
B4N
B5N
B0P
B1P
B3P
B4P
B2P
B5P
B6P
51
B7N
50
B7P
49
B8N
48
B8P
47
B9N
46
B9P
45
B10N
44
B10P
43
B11N
42
B11P
41
DGND
40
DV
DD
39
SEL0
38
N.C.
37
N.C.
36
N.C.
35
N.C.
TOP VIEW
68
67 66 65 64
63 62 61 60 59 58
57 56 55 54 53 52
Applications
N.C.
1
2
3
4
5
6
7
8
9
EP
Base Stations: Single/Multicarrier UMTS,
CDMA, GSM
Communications: LMDS, MMDS, Point-to-Point
Microwave
Digital Signal Synthesis
Automated Test Equipment (ATE)
Instrumentation
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
DGND
MAX5886
DV
DD
10
VCLK
11
CLKGND
12
CLKP
13
CLKN
14
CLKGND
15
VCLK
16
PD
17
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
AGND
REFIO
IOUTN
FSADJ
DACREF
IOUTP
AGND
N.C.
AGND
AGND
AGND
B6N
AV
DD
AV
DD
AV
DD
AV
DD
QFN
________________________________________________________________
Maxim Integrated Products
AV
DD
N.C.
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
MAX5886
ABSOLUTE MAXIMUM RATINGS
AV
DD
, DV
DD
, VCLK to AGND................................-0.3V to +3.9V
AV
DD
, DV
DD
, VCLK to DGND ...............................-0.3V to +3.9V
AV
DD
, DV
DD
, VCLK to CLKGND ...........................-0.3V to +3.9V
AGND, CLKGND to DGND....................................-0.3V to +0.3V
DACREF, REFIO, FSADJ to AGND.............-0.3V to AV
DD
+ 0.3V
IOUTP, IOUTN to AGND................................-1V to AV
DD
+ 0.3V
CLKP, CLKN to CLKGND...........................-0.3V to VCLK + 0.3V
B0P/B0N–B11P/B11N, SEL0,
PD to DGND ...........................................-0.3V to DV
DD
+ 0.3V
Continuous Power Dissipation (T
A
= +70°C)
68-Pin QFN-EP (derate 41.7mW/°C above +70°C) ......3333mW
Thermal Resistance (θ
JA
) ..............................................+24°C/W
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range ............................-60°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AV
DD
= DV
DD
= VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, V
REFIO
= 1.25V, differential transformer-coupled
analog output, 50Ω double terminated (Figure 7), I
OUT
= 20mA, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
≥+25°C
guaranteed by
production test, <+25°C guaranteed by design and characterization. Typical values are at T
A
= +25°C.)
PARAMETER
STATIC PERFORMANCE
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Offset Drift
Full-Scale Gain Error
Gain Drift
Full-Scale Output Current
Min Output Voltage
Max Output Voltage
Output Resistance
Output Capacitance
DYNAMIC PERFORMANCE
Output Update Rate
Noise Spectral Density
Spurious-Free Dynamic Range to
Nyquist
f
CLK
f
CLK
= 100MHz
f
CLK
= 200MHz
SFDR
f
CLK
= 100MHz
f
OUT
= 16MHz, -12dB FS
f
OUT
= 80MHz, -12dB FS
f
OUT
= 1MHz, 0dB FS
f
OUT
= 1MHz, -6dB FS
f
OUT
= 1MHz, -12dB FS
1
-151
-154
88
86
80
dBc
500
Msps
dB FS/
Hz
R
OUT
C
OUT
I
OUT
GE
FS
External reference, T
A
≥
+25°C
Internal reference
External reference
(Note 1)
Single ended
Single ended
2
-0.5
1.1
1
5
-3.5
±100
±50
20
INL
DNL
OS
Measured differentially
Measured differentially
-0.025
12
±0.2
±0.15
±0.01
±50
+1.5
+0.025
Bits
LSB
LSB
%FS
ppm/°C
%FS
ppm/°C
mA
V
V
MΩ
pF
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= DV
DD
= VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, V
REFIO
= 1.25V, differential transformer-coupled
analog output, 50Ω double terminated (Figure 7), I
OUT
= 20mA, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
≥+25°C
guaranteed by
production test, <+25°C guaranteed by design and characterization. Typical values are at T
A
= +25°C.)
PARAMETER
SYMBOL
CONDITIONS
f
CLK
= 100MHz
f
OUT
= 10MHz, -12dB FS
f
OUT
= 30MHz, -12dB FS
f
OUT
= 10MHz, -12dB FS
f
CLK
= 200MHz
SFDR
f
OUT
= 16MHz, -12dB FS,
T
A
≥
+25°C
f
OUT
= 50MHz, -12dB FS
f
OUT
= 80MHz, -12dB FS
f
OUT
= 10MHz, -12dB FS
f
CLK
= 500MHz
f
OUT
= 30MHz, -12dB FS
f
OUT
= 50MHz, -12dB FS
f
OUT
= 80MHz, -12dB FS
f
CLK
= 200MHz
2-Tone IMD
TTIMD
f
CLK
= 200MHz
4-Tone IMD, 1MHz Frequency
Spacing, GSM Model
Adjacent Channel Leakage
Power Ratio, 4.1MHz Bandwidth,
WCDMA Model
Output Bandwidth
REFERENCE
Internal Reference Voltage Range
Reference Voltage Drift
Reference Input Compliance
Range
Reference Input Resistance
ANALOG OUTPUT TIMING
Output Fall Time
Output Rise Time
Output Voltage Settling Time
Output Propagation Delay
Glitch Energy
Output Noise
TIMING CHARACTERISTICS
Data to Clock Setup Time
Data to Clock Hold Time
t
SETUP
t
HOLD
Referenced to rising edge of clock (Note 4)
Referenced to rising edge of clock (Note 4)
-0.8
1.8
ns
ns
N
OUT
I
OUT
= 2mA
I
OUT
= 20mA
t
FALL
t
RISE
t
SETTLE
t
PD
90% to 10% (Note 3)
10% to 90% (Note 3)
Output settles to 0.025% FS (Note 3)
(Note 3)
375
375
11
1.8
1
30
30
ps
ps
ns
ns
pV-s
pA/√Hz
V
REFIO
TCO
REF
V
REFIOCR
R
REFIO
0.1
10
1.12
1.22
±50
1.25
1.32
V
ppm/°C
V
kΩ
FTIMD
f
CLK
= 300MHz
f
CLK
=
184.32MHz
(Note 2)
f
OUT1
= 9MHz, -6dB FS,
f
OUT2
= 10MHz, -6dB FS
f
OUT1
= 79MHz, -6dB FS,
f
OUT2
= 80MHz, -6dB FS
f
OUT
= 32MHz, -12dB FS
69
MIN
TYP
81
76
71
76
72
64
66
63
65
58
-85
dBc
-61
-78
dBc
dBc
MAX
UNITS
MAX5886
Spurious-Free Dynamic Range to
Nyquist
ACLR
BW
-1dB
f
OUT
= 61.44MHz
70
450
dB
MHz
_______________________________________________________________________________________
3
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
MAX5886
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= DV
DD
= VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, V
REFIO
= 1.25V, differential transformer-coupled
analog output, 50Ω double terminated (Figure 7), I
OUT
= 20mA, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
≥+25°C
guaranteed by
production test, <+25°C guaranteed by design and characterization. Typical values are at T
A
= +25°C.)
PARAMETER
Data Latency
Minimum Clock Pulse Width High
t
CH
CLKP, CLKN
Minimum Clock Pulse Width Low
t
CL
CLKP, CLKN
LVDS LOGIC INPUTS (B0N–B11N, B0P–B11P)
Differential Input Logic High
Differential Input Logic Low
Common-Mode Voltage Range
Differential Input Resistance
Input Capacitance
CMOS LOGIC INPUTS (PD, SEL0)
Input Logic High
Input Logic Low
Input Leakage Current
Input Capacitance
CLOCK INPUTS (CLKP, CLKN)
Differential Input Voltage Swing
Differential Input Slew Rate
Common-Mode Voltage Range
Input Resistance
Input Capacitance
POWER SUPPLIES
Analog Supply Voltage Range
Digital Supply Voltage Range
Clock Supply Voltage Range
Analog Supply Current
Digital Supply Current
Clock Supply Current
AV
DD
DV
DD
V
CLK
I
AVDD
I
DVDD
I
VCLK
f
CLK
= 100Msps, f
OUT
= 1MHz
Power-down
f
CLK
= 100Msps, f
OUT
= 1MHz
Power-down
f
CLK
= 100Msps, f
OUT
= 1MHz
Power-down
3.135
3.135
3.135
3.3
3.3
3.3
27
0.3
6.4
10
5.6
10
3.465
3.465
3.465
V
V
V
mA
mA
µA
mA
µA
V
CLK
SR
CLK
V
COM
R
CLK
C
CLK
Sine wave
Square wave
(Note 5)
≥1.5
≥0.5
>100
1.5
±20%
5
5
V
P-P
V/µs
V
kΩ
pF
V
IH
V
IL
I
IN
C
IN
-15
5
0.7 x
DV
DD
0.3 x
DV
DD
+15
V
V
µA
pF
V
IH
V
IL
V
COM
R
IN
C
IN
1.125
85
100
5
100
-100
1.375
125
SYMBOL
CONDITIONS
MIN
TYP
3.5
0.9
0.9
MAX
UNITS
Clock
cycles
ns
ns
mV
mV
V
Ω
pF
4
_______________________________________________________________________________________
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= DV
DD
= VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, V
REFIO
= 1.25V, differential transformer-coupled
analog output, 50Ω double terminated (Figure 7), I
OUT
= 20mA, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
≥+25°C
guaranteed by
production test, <+25°C guaranteed by design and characterization. Typical values are at T
A
= +25°C.)
PARAMETER
Power Dissipation
Power-Supply Rejection Ratio
SYMBOL
P
DISS
PSRR
Power-down
AV
DD
= VCLK = DV
DD
= 3.3V
±5%
(Note 6)
-1
CONDITIONS
f
CLK
= 100Msps, f
OUT
= 1MHz
MIN
TYP
130
1
+1
MAX
.
UNITS
mW
% FS/V
MAX5886
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Nominal full-scale current I
OUT
= 32
✕
I
REF
.
This parameter does not include update-rate depending effects of sin(x)/x filtering inherent in the MAX5886.
Parameter measured single ended into a 50Ω termination resistor.
Parameter guaranteed by design.
A differential clock input slew rate of >100V/µs is required to achieve the specified dynamic performance.
Parameter defined as the change in midscale output caused by a ±5% variation in the nominal supply voltage.
Typical Operating Characteristics
(AV
DD
= DV
DD
= VCLK = 3.3V, external reference, V
REFIO
= 1.25V, R
L
= 50Ω, I
OUT
= 20mA, T
A
= +25°C, unless otherwise noted.)
SPURIOUS-FREE DYNAMIC RANGE
vs. OUTPUT FREQUENCY (f
CLK
= 100MHz)
MAX5886 toc01
SPURIOUS-FREE DYNAMIC RANGE
vs. OUTPUT FREQUENCY (f
CLK
= 200MHz)
MAX5886 toc02
SPURIOUS-FREE DYNAMIC RANGE
vs. OUTPUT FREQUENCY (f
CLK
= 500MHz)
90
80
70
SFDR (dBc)
60
50
40
30
20
10
0
0dB FS
-6dB FS
-12dB FS
MAX5886 toc03
100
90
80
70
SFDR (dBc)
60
50
40
30
20
10
0
0
10
20
30
40
-6dB FS
0dB FS
-12dB FS
100
90
80
70
SFDR (dBc)
60
50
40
30
20
10
0
-6dB FS
0dB FS
-12dB FS
100
50
10
20
30
40
50
60
70
80
90 100
5
55
105
155
205
255
f
OUT
(MHz)
f
OUT
(MHz)
f
OUT
(MHz)
2-TONE INTERMODULATION DISTORTION
(f
CLK
= 100MHz)
MAX5886 toc04
2-TONE IMD vs. OUTPUT FREQUENCY
(1MHz CARRIER SPACING, f
CLK
= 200MHz)
MAX5886 toc05
2-TONE INTERMODULATION DISTORTION
(f
CLK
= 500MHz)
-10
-20
OUTPUT POWER (dBm)
-30
-40
-50
-60
-70
-80
-90
2 x f
T1
- f
T2
2 x f
T2
- f
T1
f
T1
f
T2
A
OUT
= -6dB FS
BW = 12MHz
f
T1
= 78.7964MHz
f
T2
= 79.7729MHz
MAX5886 toc06
0
-10
-20
OUTPUT POWER (dBm)
-30
-40
-50
-60
-70
-80
-90
-100
3
5
7
9
f
OUT
(MHz)
11
13
2 x f
T1
- f
T2
2 x f
T2
- f
T1
f
T1
f
T2
A
OUT
= -6dB FS
BW = 12MHz
f
T1
= 8.9478MHz
f
T2
= 9.8999MHz
-100
0
-90
TWO-TONE IMD (dBc)
-12dB FS
-80
-70
-6dB FS
-60
-50
15
10
20
30
40
50
60
70
80
f
OUT
(MHz)
-100
74
76
78
80
f
OUT
(MHz)
82
84
86
_______________________________________________________________________________________
5
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