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74LV74DB,118: 产品描述Flip Flops DUAL D-TYPE POS; 产品类别逻辑逻辑; 文件大小801KB，共18页; 制造商NXP(恩智浦); 官网地址https://www.nxp.com; 标准

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74LV74DB,118概述

Flip Flops DUAL D-TYPE POS

74LV74DB,118规格参数

参数名称	属性值
Brand Name	NXP Semiconductor
是否Rohs认证	符合
厂商名称	NXP(恩智浦)
零件包装代码	SSOP1
包装说明	SSOP,
针数	14
制造商包装代码	SOT337-1
Reach Compliance Code	compliant
Is Samacsys	N
系列	LV/LV-A/LVX/H
JESD-30 代码	R-PDSO-G14
JESD-609代码	e4
长度	6.2 mm
负载电容（CL）	50 pF
逻辑集成电路类型	D FLIP-FLOP
湿度敏感等级	1
位数	1
功能数量	2
端子数量	14
最高工作温度	125 °C
最低工作温度	-40 °C
输出极性	COMPLEMENTARY
封装主体材料	PLASTIC/EPOXY
封装代码	SSOP
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）	260
传播延迟（tpd）	33 ns
认证状态	Not Qualified
座面最大高度	2 mm
最大供电电压 (Vsup)	5.5 V
最小供电电压 (Vsup)	1 V
标称供电电压 (Vsup)	3.3 V
表面贴装	YES
技术	CMOS
温度等级	AUTOMOTIVE
端子面层	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式	GULL WING
端子节距	0.65 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	30
触发器类型	POSITIVE EDGE
宽度	5.3 mm
最小 fmax	48 MHz
Base Number Matches	1

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74LV74

Dual D-type flip-flop with set and reset; positive-edge trigger

Rev. 4 — 9 December 2015

Product data sheet

1. General description

The 74LV74 is a dual positive edge triggered, D-type flip-flop. It has individual data (nD)

inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ

outputs.

The set and reset are asynchronous active LOW inputs that operate independently of the

clock input. Information on the data input is transferred to the nQ output on the

LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up time

prior to the LOW-to-HIGH clock transition, for predictable operation. Schmitt-trigger action

in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

2. Features and benefits



Wide supply voltage range from 1.0 V to 5.5 V

Optimized for low voltage applications: 1.0 V to 3.6 V

Direct interface with TTL levels (2.7 V to 3.6 V)

ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-A exceeds 200 V



Specified from

40 C

to +85

C

and from

40 C

to +125

C

3. Ordering information

Table 1.

Ordering information

Temperature range

74LV74D

74LV74DB

74LV74PW

40 C

to +125

C

40 C

to +125

C

40 C

to +125

C

Name

SO14

SSOP14

Description

plastic shrink small outline package; 14 leads; body width

5.3 mm

Version

SOT337-1

SOT402-1

Type number Package

plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

TSSOP14 plastic thin shrink small outline package; 14 leads; body

width 4.4 mm

74LV74DB,118相似产品对比

	74LV74DB,118	74LV74PW,112	74LV74DB,112	74LV74D,112	74LV74D,118	74LV74PW,118
描述	Flip Flops DUAL D-TYPE POS	Flip Flops DUAL D-TYPE POS	Flip Flops DUAL D-TYPE POS	Flip Flops DUAL D-TYPE POS	Flip Flops DUAL D-TYPE POS	Flip Flops DUAL D-TYPE POS EDGE-TRIG
Brand Name	NXP Semiconductor	NXP Semiconductor	NXP Semiconductor	NXP Semiconductor	NXP Semiconductor	NXP Semiconductor
是否Rohs认证	符合	符合	符合	符合	符合	符合
零件包装代码	SSOP1	TSSOP	SSOP1	SOIC	SOIC	TSSOP
包装说明	SSOP,	GREEN, PLASTIC, TSSOP1-14	SSOP, SSOP14,.3	SOP, SOP14,.25	SOP,	TSSOP,
针数	14	14	14	14	14	14
制造商包装代码	SOT337-1	SOT402-1	SOT337-1	SOT108-1	SOT108-1	SOT402-1
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant
系列	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H
JESD-30 代码	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14
JESD-609代码	e4	e4	e4	e4	e4	e4
长度	6.2 mm	5 mm	6.2 mm	8.65 mm	8.65 mm	5 mm
负载电容（CL）	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF
逻辑集成电路类型	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP
湿度敏感等级	1	1	1	1	1	1
位数	1	1	1	1	1	1
功能数量	2	2	2	2	2	2
端子数量	14	14	14	14	14	14
最高工作温度	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
最低工作温度	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
输出极性	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	SSOP	TSSOP	SSOP	SOP	SOP	TSSOP
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）	260	260	260	260	260	260
传播延迟（tpd）	33 ns	33 ns	33 ns	33 ns	33 ns	33 ns
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
座面最大高度	2 mm	1.1 mm	2 mm	1.75 mm	1.75 mm	1.1 mm
最大供电电压 (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
最小供电电压 (Vsup)	1 V	1 V	1 V	1 V	1 V	1 V
标称供电电压 (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
表面贴装	YES	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
端子面层	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD
端子形式	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
端子节距	0.65 mm	0.65 mm	0.65 mm	1.27 mm	1.27 mm	0.65 mm
端子位置	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
处于峰值回流温度下的最长时间	30	30	30	30	30	30
触发器类型	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
宽度	5.3 mm	4.4 mm	5.3 mm	3.9 mm	3.9 mm	4.4 mm
最小 fmax	48 MHz	48 MHz	48 MHz	48 MHz	48 MHz	48 MHz
厂商名称	NXP(恩智浦)	NXP(恩智浦)	NXP(恩智浦)	-	NXP(恩智浦)	NXP(恩智浦)
Is Samacsys	N	N	N	-	-	N
Base Number Matches	1	1	1	1	-	1

74LV74DB,118

74LV74DB,118概述

74LV74DB,118规格参数

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