DATASHEET
ISL62773A
Multiphase PWM Regulator for AMD Fusion™ Mobile CPUs Using SVI 2.0
The
ISL62773A
is fully compliant with AMD Fusion™ SVI 2.0
and provides a complete solution for microprocessor and
graphics processor core power. The ISL62773A controller
supports two Voltage Regulators (VRs) with three integrated
gate drivers and two optional external drivers for maximum
flexibility. The Core VR can be configured for 3-, 2-, or 1-phase
operation while the Northbridge VR supports 2- or 1-phase
configurations. The two VRs share a serial control bus to
communicate with the AMD CPU and achieve lower cost and
smaller board area compared with two-chip solutions.
The PWM modulator is based on Intersil’s Robust Ripple
Regulator R3™ Technology. Compared to traditional
modulators, the R3™ modulator can automatically change
switching frequency for faster transient settling time during
load transients and improved light load efficiency.
The ISL62773A has several other key features. Both outputs
support DCR current sensing with single NTC thermistor for
DCR temperature compensation or accurate resistor current
sensing. Both outputs utilize remote voltage sense, adjustable
switching frequency, OC protection and power-good.
FN8410
Rev 1.00
November 19, 2015
Features
• Supports AMD SVI 2.0 serial data bus interface
- Serial VID clock frequency range 100kHz to 25MHz
• Dual output controller with integrated drivers
- Two dedicated core drivers
- One programmable driver for either Core or Northbridge
• Precision voltage regulation
- 0.5% system accuracy over-temperature
- 0.5V to 1.55V in 6.25mV steps
- Enhanced load line accuracy
• Supports multiple current sensing methods
- Lossless inductor DCR current sensing
- Precision resistor current sensing
• Programmable 1-, 2- or 3-phase for the core output and 1- or
2-phase for the Northbridge output
• Adaptive body diode conduction time reduction
• Superior noise immunity and transient response
• Output current and voltage telemetry
• Differential remote voltage sensing
• High efficiency across entire load range
• Programmable slew rate
• Programmable VID offset and droop on both outputs
• Programmable switching frequency for both outputs
• Excellent dynamic current balance between phases
• Protection: OCP/WOC, OVP, PGOOD and thermal monitor
• Small footprint 48 Ld 6x6 QFN package
- Pb-free (RoHS compliant)
Applications
• AMD Fusion CPU/GPU core power
• Notebook computers
Core Performance
100
90
80
EFFICIENCY (%)
70
60
50
40
30
20
10
0
0
5
10
15
20
V
OUT
CORE = 1.1V
25 30 35
I
OUT
(A)
40
45
50
55
V
IN
= 19V
V
IN
= 12V
V
IN
= 8V
V
OUT
(A)
1.12
1.10
1.08
1.06
1.04
1.02
1.00
0.98
0.96
0
V
IN
= 12V
V
IN
= 19V
V
OUT
CORE = 1.1V
5
10
15 20
30 35
I
OUT
(A)
25
40
45
50 55
V
IN
= 8V
FIGURE 1. EFFICIENCY vs LOAD
FIGURE 2. V
OUT
vs LOAD
FN8410 Rev 1.00
November 19, 2015
Page 1 of 37
ISL62773A
Table of Contents
Simplified Application Circuit with 3 Internal Drivers Used
for Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Simplified Application Circuit for Mid-Power CPUs [2+1
Configuration] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Simplified Application Circuit for Low Power CPUs [1+1
Configuration] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . .11
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Recommended Operating Conditions . . . . . . . . . . . . . . . . .11
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Gate Driver Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . .13
Theory of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Multiphase R3™ Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Diode Emulation and Period Stretching . . . . . . . . . . . . . . . . . 15
Channel Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Start-Up Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Voltage Regulation and Load Line Implementation . . . . . . . 16
Differential Sensing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Phase Current Balancing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Dynamic Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
FB2 Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Adaptive Body Diode Conduction Time Reduction . . . . . . . . 20
Resistor Configuration Options. . . . . . . . . . . . . . . . . . . . . . .20
VR Offset Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Floating DriverX AND PWM_Y Configuration . . . . . . . . . . . . . 21
VID-on-the-Fly Slew Rate Selection . . . . . . . . . . . . . . . . . . . . . 21
CCM Switching Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
AMD Serial VID Interface 2.0 . . . . . . . . . . . . . . . . . . . . . . . .
Pre-PWROK Metal VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SVI Interface Active . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VID-on-the-Fly Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SVI Data Communication Protocol . . . . . . . . . . . . . . . . . . . . .
SVI Bus Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dynamic Load Line Slope Trim . . . . . . . . . . . . . . . . . . . . . . . .
Dynamic Offset Trim. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overcurrent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current-Balance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overvoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Monitor [NTC, NTC_NB]. . . . . . . . . . . . . . . . . . . . . . .
Fault Recovery. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interface Pin Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Key Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inductor DCR Current-Sensing Network . . . . . . . . . . . . . . . .
Resistor Current-Sensing Network . . . . . . . . . . . . . . . . . . . . .
Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Load Line Slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Compensator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current Balancing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Monitor Component Selection . . . . . . . . . . . . . . . . .
Bootstrap Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . .
Optional FCCM_NB Filtering . . . . . . . . . . . . . . . . . . . . . . . . . .
22
22
22
22
23
25
25
25
26
26
26
27
27
27
27
28
28
28
28
30
30
31
31
32
32
33
33
Telemetry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Layout Guidelines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
PCB Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
About Intersil. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
FN8410 Rev 1.00
November 19, 2015
Page 2 of 37
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