MGA-621P8
450 MHz–1500 MHz Low Noise Amplifier
Data Sheet
Description
Avago Technologies' MGA-621P8 is an economical, easy-to-use
GaAs MMIC Low Noise Amplifier (LNA). The LNA has low noise
and high linearity achieved through the use of Avago
Technologies' proprietary 0.25 μm GaAs Enhancement-mode
pHEMT process.
It is housed in the miniature 2.0 mm × 2.0 mm × 0.75 mm 8-pin
Dual-Flat-Non-Lead (DFN) package. The device is designed for
optimum use from 450 MHz up to 1.5 GHz. For optimum
performance at higher frequency from 1.5 GHz to 4.0 GHz,
MGA-622P8 is recommended. Both MGA-621P8 and
MGA-622P8 share the same package and pinout configuration.
The compact footprint and low profile coupled with low noise,
high gain and high linearity make this an ideal choice as a low
noise amplifier for small cell base station application.
Features
Low noise figure
High linearity performance
GaAs E-pHEMT Technology (see Note)
Low cost small package size 2.0 mm × 2.0 mm × 0.75 mm
Integrated power down control pin
Enhancement mode technology employs
positive gate voltage, thereby eliminating the
need of negative gate voltage associated with
conventional depletion mode devices.
NOTE
Specifications
Typical performance at 900 MHz; 4V, 65 mA
Simplified Schematic
19.3 dB Gain
0.67 dB Noise Figure
36.5 dBm Output IP3
Applications
Low noise amplifier for small cell base station applications.
Other low noise applications.
*L3: Optional for S11 improvement.
Avago Technologies
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MGA-621P8
Data Sheet
Pin Configuration and Package Marking
Pin Configuration and Package Marking
21X
Pin1 – Vbias
Pin2 – RFinput
Pin3 – Not used
Pin4 – Not used
Pin5 – PwrDown
Pin6 – Not used
Pin7 – RFoutput/Vdd
Pin8 – Not used
Center Tab – Ground
NOTE
Package marking provides orientation and identification. "21" is the device code, and "X" is the month code.
Absolute Maximum Rating T
A
=25°C (see Note)
Symbol
Vdd
Idd
P
in,max
P
diss
T
j
T
STG
T
amb
a.
Parameter
Device Voltage, RF output to ground
Drain Current
CW RF Input Power (Vdd=4V, Id=65mA)
Total Power Dissipation
a
Junction Temperature
Storage Temperature
Ambient Temperature
V
mA
Units
5.5
90
Absolute Maximum
dBm
W
°C
°C
°C
+20
0.5
150
–65 to 150
–40 to 85
Power dissipation with device turned on. Derate at 16.25mW/°C for TB > 134°C.
NOTE
Operation of this device in excess of any of these limits may cause permanent damage.
Thermal Resistance
Thermal Resistance
a
V
dd
= 4.0V (I
dd
= 65mA),
jc
= 61°C/W
a.
Thermal resistance measured using Infra-Red
Measurement Technique.
Avago Technologies
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MGA-621P8
Data Sheet
Electrical Specifications
Electrical Specifications
RF performance at T
A
= 25°C, Z
0
= 50
,
Vdd =4V, measured on the circuit board in Figure 6 with component list in Table 1 for
900 MHz.
Symbol
Vdd
Idd
Gain
NF
OIP3
a
OP1dB
IRL
ORL
a.
Parameter and Test Condition
Device operating voltage
Device current
Gain
Noise Figure
Output Third order intercept point
Output Power at 1dB Gain Compression
Input Return Loss, 50 source
Output Return Loss, 50 load
Frequency (MHz)
V
mA
900
900
900
900
900
900
dB
dB
Unit
—
50
18.5
—
33.5
—
—
—
Min
Typ
4.0
65
19.3
0.67
36.5
21.8
15.0
18.0
—
80
20.0
1.0
—
—
—
—
Max
dBm
dBm
dB
dB
2-tone OIP3 test condition: FRF1, FRF2 = 1MHz separation with input power = –10dBm per tone.
NOTE
1.
2.
Measurements at 900 MHz obtained using demo board described in Figure 6.
For NF data, board losses of the input have not been de-embedded.
Truth Table
VpwrDwn(V)
LNA Mode
Power Down Mode
0 or open
3.3
Avago Technologies
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MGA-621P8
Data Sheet
Product Consistency Distribution Charts (see Notes)
Product Consistency Distribution Charts (see Notes)
NOTE
1.
2.
Distribution data samples are 2000 samples taken from 2 different wafers. Future wafers allocated to this product may
have nominal values anywhere between the upper and lower limits.
Circuit Losses have not been de-embedded from the actual measurements.
Figure 1 Idd @ 0.9 GHz, 4V, Mean = 65 mA
Figure 2 NF @ 0.9 GHz, 4V, Mean = 0.67 dB
Idd, Max = 80, Min = 50
NF, Max = 1.0
Figure 3 OIP3 @ 0.9 GHz, 4V, Mean = 37.5 dBm
Figure 4 Gain @ 0.9 GHz, 4V, Mean=19.3 dB
OIP3, Min = 33.5
Gain, Max = 20.0, Min = 18.5
Avago Technologies
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MGA-621P8
Data Sheet
Demo Board Layout
Demo Board Layout
Figure 5 Demo Board Layout Diagram
Demo Board Schematic
Figure 6 Demo Board Schematic Diagram
NOTE
Detail of the components needed for this
product is shown in
Table 1.
NOTE
Recommended PCB material is 10 mils Rogers
RO4350.
Suggested component values may vary according
to layout and PCB material.
Table 1 Component List for 450 MHz to 1.5 GHz Matching
Part
C1, C2
C3, C5
C4
C6
C7
L1, L2
L3
Rbias
Size
0402
0603
0402
0603
0402
0402
0402
0402
10 pF (Murata)
33 nH (Murata)
Value
100 pF (Murata)
4.7 μF (Murata)
33 pF (Murata)
Detail Part Number
GRM1555C1H101JA01D
GRM188R60J475KE19D
GRM1555C1H330JZ01D
Not Used
GRM1555C1H100JA01D
LQP15MN33NG02
Not used
Not used
NOTE
C1, C2 are DC Blocking capacitors; L1 connect
DC bias from Pin1 to Pin2, L2 RFchoke and
output match for OIP3; C3, C4, C5, C7 are
bypass capacitors; L3 is optional for S11
improvement; Rbias is not use for this
product.
Avago Technologies
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