STM32L486xx
Ultra-low-power ARM
®
Cortex
®
-M4 32-bit MCU+FPU, 100DMIPS,
1MB Flash, 128KB SRAM, USB OTG FS, LCD, ext. SMPS, AES
Datasheet
-
production data
Features
•
Ultra-low-power with FlexPowerControl
– 1.71 V to 3.6 V power supply
– -40 °C to 85/105/125 °C temperature range
– 300 nA in V
BAT
mode: supply for RTC and
32x32-bit backup registers
– 30 nA Shutdown mode (5 wakeup pins)
– 120 nA Standby mode (5 wakeup pins)
– 420 nA Standby mode with RTC
– 1.1 µA Stop 2 mode, 1.4 µA with RTC
– 100 µA/MHz run mode (LDO Mode)
– 39
μA/MHz
run mode (@3.3 V SMPS
Mode)
– Batch acquisition mode (BAM)
– 4 µs wakeup from Stop mode
– Brown out reset (BOR)
– Interconnect matrix
•
Core: ARM
®
32-bit Cortex
®
-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait-state execution
from Flash memory, frequency up to 80 MHz,
MPU, 100DMIPS and DSP instructions
•
Performance benchmark
– 1.25 DMIPS/MHz (Drystone 2.1)
– 273.55 CoreMark
®
(3.42 CoreMark/MHz @
80 MHz)
•
Energy benchmark
– 220 ULPBENCH
®
score
•
Clock Sources
– 4 to 48 MHz crystal oscillator
– 32 kHz crystal oscillator for RTC (LSE)
– Internal 16 MHz factory-trimmed RC (±1%)
– Internal low-power 32 kHz RC (±5%)
– Internal multispeed 100 kHz to 48 MHz
oscillator, auto-trimmed by LSE (better than
±0.25 % accuracy)
– 3 PLLs for system clock, USB, audio, ADC
LQFP144 (20 × 20)
LQFP100 (14 x 14)
LQFP64 (10 x 10)
UFBGA132
(7 × 7)
WLCSP72
•
Up to 114 fast I/Os, most 5 V-tolerant, up to 14
I/Os with independent supply down to 1.08 V
•
RTC with HW calendar, alarms and calibration
•
LCD 8× 40 or 4× 44 with step-up converter
•
Up to 24 capacitive sensing channels: support
touchkey, linear and rotary touch sensors
•
16x timers: 2x 16-bit advanced motor-control,
2x 32-bit and 5x 16-bit general purpose, 2x 16-
bit basic, 2x low-power 16-bit timers (available
in Stop mode), 2x watchdogs, SysTick timer
•
Memories
– 1 MB Flash, 2 banks read-while-write,
proprietary code readout protection
– 128 KB of SRAM including 32 KB with
hardware parity check
– External memory interface for static
memories supporting SRAM, PSRAM,
NOR and NAND memories
– Quad SPI memory interface
•
4x digital filters for sigma delta modulator
•
Rich analog peripherals (independent supply)
– 3× 12-bit ADC 5 Msps, up to 16-bit with
hardware oversampling, 200 µA/Msps
– 2x 12-bit DAC, low-power sample and hold
– 2x operational amplifiers with built-in PGA
– 2x ultra-low-power comparators
•
AES: 128/256-bit key encryption hardware
accelerator
•
20x communication interfaces
– USB OTG 2.0 full-speed, LPM and BCD
– 2x SAIs (serial audio interface)
– 3x I2C FM+(1 Mbit/s), SMBus/PMBus
– 5x USARTs (ISO 7816, LIN, IrDA, modem)
July 2017
This is information on a product in full production.
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STM32L486xx
–
–
–
–
–
1x LPUART (Stop 2 wake-up)
3x SPIs (4x SPIs with the Quad SPI)
CAN (2.0B Active) and SDMMC interface
SWPMI single wire protocol master I/F
IRTIM (Infrared interface)
Reference
STM32L486xx
•
14-channel DMA controller
•
True random number generator
•
CRC calculation unit, 96-bit unique ID
•
Development support: serial wire debug
(SWD), JTAG, Embedded Trace Macrocell™
Table 1. Device summary
Part numbers
STM32L486JG, STM32L486QG, STM32L486RG, STM32L486VG, STM32L486ZG
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Contents
Contents
1
2
3
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
ARM
®
Cortex
®
-M4 core with FPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . . 18
Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Firewall . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Cyclic redundancy check calculation unit (CRC) . . . . . . . . . . . . . . . . . . . 21
Power supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.9.1
3.9.2
3.9.3
3.9.4
3.9.5
3.9.6
Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Reset mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
VBAT operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.10
3.11
3.12
3.13
3.14
Interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
General-purpose inputs/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . 39
Direct memory access controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Interrupts and events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.14.1
3.14.2
Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 40
Extended interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . 40
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Internal voltage reference (VREFINT) . . . . . . . . . . . . . . . . . . . . . . . . . . 42
VBAT battery voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
3.15
Analog to digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
3.15.1
3.15.2
3.15.3
3.16
Digital to analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
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STM32L486xx
3.17
3.18
3.19
3.20
3.21
3.22
3.23
3.24
3.25
Voltage reference buffer (VREFBUF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Comparators (COMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Operational amplifier (OPAMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Touch sensing controller (TSC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Liquid crystal display controller (LCD) . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Digital filter for Sigma-Delta Modulators (DFSDM) . . . . . . . . . . . . . . . . . . 45
Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Advanced encryption standard hardware accelerator (AES) . . . . . . . . . . 47
Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3.25.1
3.25.2
3.25.3
3.25.4
3.25.5
3.25.6
3.25.7
3.25.8
Advanced-control timer (TIM1, TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . . 48
General-purpose timers (TIM2, TIM3, TIM4, TIM5, TIM15, TIM16,
TIM17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Basic timers (TIM6 and TIM7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Low-power timer (LPTIM1 and LPTIM2) . . . . . . . . . . . . . . . . . . . . . . . . 49
Infrared interface (IRTIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
System window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
3.26
3.27
3.28
3.29
3.30
3.31
3.32
3.33
3.34
3.35
3.36
3.37
3.38
Real-time clock (RTC) and backup registers . . . . . . . . . . . . . . . . . . . . . . 51
Inter-integrated circuit interface (I
2
C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Universal synchronous/asynchronous receiver transmitter (USART) . . . 53
Low-power universal asynchronous receiver transmitter (LPUART) . . . . 54
Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Serial audio interfaces (SAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Single wire protocol master interface (SWPMI) . . . . . . . . . . . . . . . . . . . . 56
Controller area network (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Secure digital input/output and MultiMediaCards Interface (SDMMC) . . . 57
Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . . 57
Flexible static memory controller (FSMC) . . . . . . . . . . . . . . . . . . . . . . . . 58
Quad SPI memory interface (QUADSPI) . . . . . . . . . . . . . . . . . . . . . . . . . 59
Development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
3.38.1
3.38.2
Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 60
Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
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Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
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6
Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
6.1
Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
6.1.6
6.1.7
Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . 109
6.2
6.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
6.3.8
6.3.9
6.3.10
6.3.11
6.3.12
6.3.13
6.3.14
6.3.15
6.3.16
6.3.17
6.3.18
6.3.19
6.3.20
6.3.21
6.3.22
6.3.23
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . 113
Embedded reset and power control block characteristics . . . . . . . . . . 113
Embedded voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Wakeup time from low-power modes and voltage scaling
transition times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 147
Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 152
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Electrical sensitivity characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
Extended interrupt and event controller input (EXTI) characteristics . . 170
Analog switches booster . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
Analog-to-Digital converter characteristics . . . . . . . . . . . . . . . . . . . . . 171
Digital-to-Analog converter characteristics . . . . . . . . . . . . . . . . . . . . . 184
Voltage reference buffer characteristics . . . . . . . . . . . . . . . . . . . . . . . . 189
Comparator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191
Operational amplifiers characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 192
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 196
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