19-3871; Rev 2; 5/06
KIT
ATION
EVALU
BLE
AVAILA
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
General Description
Features
♦
Pin-Selectable I
2
C- or SPI-Compatible Interface
♦
Guaranteed Low Output Leakage Current in
Shutdown (±1µA max)
♦
Guaranteed Monotonic over Extended
Temperature Range
♦
Dual Outputs for Balanced Systems
♦
♦
♦
♦
♦
Current Outputs Source Up to 30mA per DAC
Parallelable Outputs for 60mA Applications
Output Stable with RF Filters
Internal or External Reference Capability
Digital Output (DOUT) Available for Daisy
Chaining in SPI Mode
♦
+2.7V to +5.25V Single-Supply Operation
♦
16-Pin (3mm x 3mm) Thin QFN Package
♦
Programmable Output Current Range Set by
Software and Adjustment Resistor
MAX5550
The MAX5550 dual, 10-bit, digital-to-analog converter
(DAC) features high-output-current capability. The
MAX5550 sources up to 30mA per DAC, making it ideal
for PIN diode biasing applications. Outputs can also be
paralleled for high-current applications (up to 60mA
typ). Operating from a single +2.7V to +5.25V supply,
the MAX5550 typically consumes 1.5mA per DAC in
normal operation and less than 1µA (max) in shutdown
mode. The MAX5550 also features low output leakage
current in shutdown mode (±1µA max) that is essential
to ensure that the external PIN diodes are off.
Additional features include an integrated +1.25V
bandgap reference, and a control amplifier to ensure
high accuracy and low-noise performance. A separate
reference input (REFIN) allows for the use of an external
reference source, such as the MAX6126, for improved
gain accuracy. A pin-selectable I
2
C-/SPI™-compatible
serial interface provides optimum flexibility for the
MAX5550. The maximum programmable output current
value is set using software and an adjustment resistor.
The MAX5550 is available in a (3mm x 3mm) 16-pin thin
QFN package, and is specified over the extended
(-40°C to +85°C) temperature range.
Ordering Information
PART
PIN-PACKAGE
PKG
CODE
T1633F-3
TOP
MARK
ACZ
Applications
PIN Diode Biasing
RF Attenuator Control
VCO Tuning
MAX5550ETE 16 Thin QFN-EP*
*EP = Exposed paddle.
Note:
Device is specified over the -40°C to +85°C operating
range.
Functional Diagram
REFIN
V
DD
+1.25V
REF
BUFFER
P
10-BIT CURRENT-STEERING
DAC A
OUTA
FSADJA
V
DD
MAX5550
P
10-BIT CURRENT-STEERING
DAC B
OUTB
FSADJB
SPI is a trademark of Motorola, Inc.
SPI/I2C
DAC REGISTER A
DAC REGISTER B
16-BIT INPUT REGISTER
Pin Configuration appears at end of data sheet.
SCLK/SCL DIN/SDA
CS/A0
DOUT/A1
GND
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
MAX5550
ABSOLUTE MAXIMUM RATINGS
V
DD
to GND .............................................................-0.3V to +6V
OUTA, OUTB to GND .................................-0.3V to (V
DD
+ 0.3V)
REFIN,
CS/AO,
DOUT/AI, SPI/I2C, FSADJA,
FSADJB to GND ......................................-0.3V to (V
DD
+ 0.3V)
SCLK/SCL, DIN/SDA ................................................-0.3V to +6V
Continuous Power Dissipation (T
A
= +85°C)
16-Pin Thin QFN (derate 17.5mW/°C above +70°C) ..1398.6mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= +2.7V to +5.25V, GND = 0, V
REFIN
= +1.25V, internal reference, R
FSADJ_
= 20kΩ; compliance voltage = (V
DD
- 0.6V),
V
SCLK/SCL
= 0, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
DD
= +3.0V and T
A
= +25°C.) (Note 1)
PARAMETER
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset
Zero-Scale Error
Full-Scale Error
REFERENCE
Internal Reference Range
Internal Reference Tempco
External Reference Range
External Reference Input Current
DAC OUTPUTS
Full-Scale Current
Output Current Leakage in
Shutdown
Output Capacitance
Current Source Dropout Voltage
(V
DD
- V
OUT
_)
Output Impedance at Full-Scale
Current
Capacitive Load to Ground
Series Inductive Load
Maximum FSADJ_ Capacitive
Load
DYNAMIC PERFORMANCE
Settling Time
Digital Feedthrough
t
S
C
LOAD
= 24pF, L
LOAD
= 27nH (Note 4)
30
2
µs
nVs
C
LOAD
L
LOAD
C
FSADJ_
I
OUT
_ = 30mA
I
OUT
_ = 20mA
T
A
= +25°C
T
A
= -40°C to +85°C
1
0.55
0.6
100
10
100
75
kΩ
nF
nH
pF
V
10
(Note 3)
1
30
±1
mA
µA
pF
0.5
108
1.21
1.25
30
1.5
225
1.29
V
ppm/°C
V
µA
INL
DNL
I
OS
I
OUT
_ = 1mA to 30mA, code = 0x000
I
OUT
_ = 1mA to 30mA, code = 0x3FF,
includes offset
-16
I
OUT
_ = 1mA to 30mA (Note 2)
Guaranteed monotonic
-50
-16
1
SYMBOL
CONDITIONS
MIN
10
±2
±1
TYP
MAX
UNITS
Bits
LSB
LSB
LSB
µA
LSB
STATIC PERFORMANCE—ANALOG SECTION
2
_______________________________________________________________________________________
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +2.7V to +5.25V, GND = 0, V
REFIN
= +1.25V, internal reference, R
FSADJ_
= 20kΩ; compliance voltage = (V
DD
- 0.6V),
V
SCLK/SCL
= 0, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
DD
= +3.0V and T
A
= +25°C.) (Note 1)
PARAMETER
Digital-to-Analog Glitch Impulse
DAC-to-DAC Current Matching
Wake-Up Time
POWER SUPPLIES
Supply Voltage
Supply Current
Shutdown Current
LOGIC AND CONTROL INPUTS
Input High Voltage (Note 5)
Input Low Voltage
Input Hysteresis
Input Capacitance
Input Leakage Current
Output Low Voltage
Output High Voltage
V
IH
V
IL
V
HYS
C
IN
I
IN
V
OL
V
OH
I
SINK
= 3mA
I
SOURCE
= 2mA
V
DD
-
0.5
400
600
600
130
600
100
0
20 + 0.1
x C
B
20 + 0.1
x C
B
20 + 0.1
x C
B
20 + 0.1
x C
B
70
300
300
300
300
+2.7V
≤
V
DD
≤
+3.4V
+3.4V < V
DD
≤
+5.25V
(Note 5)
0.1 x
V
DD
10
±1
0.6
0.7 x
V
DD
2.4
0.8
V
V
pF
µA
V
V
V
V
DD
I
DD
V
DD
= +5.25V, no load
+2.70
3
+5.25
6
1.2
V
mA
µA
V
DD
= +3V
V
DD
= +5V
SYMBOL
CONDITIONS
MIN
TYP
40
2
400
10
MAX
UNITS
nVs
%
µs
MAX5550
I
2
C TIMING CHARACTERISTICS (Figure 2)
SCL Clock Frequency
Setup Time for START Condition
Hold Time for START Condition
SCL Pulse-Width Low
SCL Pulse-Width High
Data Setup Time
Data Hold Time
SCL Rise Time
SCL Fall Time
SDA Rise Time
SDA Fall Time
f
SCL
t
SU:STA
t
HD:STA
t
LOW
t
HIGH
t
SU:DAT
t
HD:DAT
t
RCL
t
FCL
t
RDA
t
FDA
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
_______________________________________________________________________________________
3
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
MAX5550
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +2.7V to +5.25V, GND = 0, V
REFIN
= +1.25V, internal reference, R
FSADJ_
= 20kΩ; compliance voltage = (V
DD
- 0.6V),
V
SCLK/SCL
= 0, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
DD
= +3.0V and T
A
= +25°C.) (Note 1)
PARAMETER
Bus Free Time Between a STOP
and START Condition
Setup Time for STOP Condition
Maximum Capacitive Load for
Each Bus Line
SCLK Clock Period
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS
Fall to SCLK Rise Setup Time
SCLK Rise to
CS
Rise Hold Time
DIN Setup Time
DIN Hold Time
SCLK Fall to DOUT Transition
CS
Fall to DOUT Enable
CS
Rise to DOUT Disable
SCLK Rise to
CS
Fall Delay
CS
Rise to SCLK Rise Hold Time
CS
Pulse-Width High
SCLK Clock Period
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS
Fall to SCLK Rise Setup Time
SCLK Rise to
CS
Rise Hold Time
DIN Setup Time
DIN Hold Time
SCLK Fall to DOUT Transition
CS
Fall to DOUT Enable
CS
Rise to DOUT Disable
SCLK Rise to
CS
Fall Delay
CS
Rise to SCLK Rise Hold Time
CS
Pulse-Width High
SYMBOL
t
BUF
t
SU:STO
C
B
CONDITIONS
MIN
1.3
160
400
TYP
MAX
UNITS
µs
ns
pF
SPI TIMING CHARACTERISTICS (Figure 6)
t
CP
t
CH
t
CL
t
CSS
t
CSH
t
DS
t
DH
t
DO1
t
CSE
t
CSD
t
CS0
t
CS1
t
CSW
t
CP
t
CH
t
CL
t
CSS
t
CSH
t
DS
t
DH
t
DO1
t
CSE
t
CSD
t
CS0
t
CS1
t
CSW
C
LOAD
= 30pF
C
LOAD
= 30pF
C
LOAD
= 30pF
50
40
100
C
LOAD
= 30pF
C
LOAD
= 30pF
C
LOAD
= 30pF
50
40
100
200
80
80
25
50
40
0
40
40
40
100
40
40
25
50
40
0
40
40
40
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SPI TIMING CHARACTERISTICS FOR DAISY CHAINING (Figure 6)
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
100% production tested at T
A
= +25°C. Limits over temperature are guaranteed by design.
INL linearity is guaranteed from code 60 to code 1024.
Connect a resistor from FSADJ_ to GND to adjust the full-scale current. See the
Reference Architecture and Operation
section.
Settling time is measured from (0.25 x full scale) to (0.75 x full scale).
The device draws higher supply current when the digital inputs are driven with voltages between (V
DD
- 0.5V) and (GND +
0.5V). See the Supply Current vs. Digital Input Voltage graph in the
Typical Operating Characteristics.
4
_______________________________________________________________________________________
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
MAX5550
Typical Operating Characteristics
(V
DD
= +3.0V, GND = 0, V
REFIN
= +1.25V, internal reference, R
FSADJ_
= 20kΩ, T
A
= +25°C. unless otherwise noted).
INL vs. CODE
MAX5550 toc01
DNL vs. CODE
MAX5550 toc02
INL vs. TEMPERATURE
3.5
3.0
INL (LSB)
2.5
2.0
1.5
1.0
0.5
0
MAX5550 toc03
2.0
1.5
1.0
1.00
0.75
0.50
DNL (LSB)
0.25
0
-0.25
-0.50
-0.75
-1.00
4.0
INL (LSB)
0.5
0
-0.5
-1.0
-1.5
-2.0
0
128 256 384 512 640 768 896 1024
CODE
0
128 256 384 512 640 768 896 1024
CODE
-40
-15
10
35
TEMPERATURE (°C)
60
85
DNL vs. TEMPERATURE
MAX5550 toc04
MAXIMUM INL ERROR vs.
OUTPUT CURRENT RANGES
MAX5550 toc05
ZERO-SCALE OUTPUT CURRENT
vs. TEMPERATURE
4.0
ZERO-SCALE CURRENT (nA)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
V
DD
= 3V
V
DD
= 5V
MAX5550 toc06
0.40
0.35
0.30
DNL (LSB)
3.0
2.5
2.0
INL (LSB)
1.5
1.0
0.5
0
4.5
0.25
0.20
0.15
0.10
0.05
0
-40
-15
10
35
TEMPERATURE (°C)
60
85
0
1–2
15–30
1.5–3
4.5–9
OUTPUT CURRENT RANGE (mA)
2–5
8–16
-40
-15
10
35
60
85
TEMPERATURE (°C)
FULL-SCALE CURRENT vs. TEMPERATURE
29.86
FULL-SCALE CURRENT (mA)
29.84
29.82
29.80
29.78
29.76
29.74
29.72
-40
-15
10
35
TEMPERATURE (°C)
60
85
V
DD
= 3V
V
DD
= 5V
MAX5550 toc07
SETTLING TIME
(FULL-SCALE POSITIVE STEP)
MAX5550 toc08
SETTLING TIME
(FULL-SCALE NEGATIVE STEP)
MAX5550 toc09
29.88
CS
2V/div
R
LOAD
= 65Ω
C
LOAD
= 24pF
CS
2V/div
R
LOAD
= 65Ω
C
LOAD
= 24pF
10µs/div
V
OUT_
1V/div
V
OUT_
1V/div
10µs/div
_______________________________________________________________________________________
5
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