SN250
Single-chip ZigBee® 802.15.4 solution
Features
■
■
Integrated 2.4GHz, IEEE 802.15.4-compliant
transceiver:
– Robust RX filtering allows co-existence
with IEEE 802.11g and Bluetooth devices
–
−
97 dBm RX sensitivity (1% PER, 20 byte
packet)
– + 3dBm nominal output power
– Increased radio performance mode (boost
mode) gives
−98
dBm sensitivity and
+5dBm
transmit power
– Integrated VCO and loop filter
Integrated IEEE 802.15.4 PHY and lower MAC
with DMA
Integrated hardware support for Packet Trace
Interface for InSight Development Environment
Provides integrated RC oscillator for low power
operation
Supports optional 32.768-kHz crystal oscillator
for higher accuracy needs
16-bit XAP2b microprocessor
Integrated memory:
– 128 Kbytes of Flash
– 5 Kbytes of SRAM
Configurable memory protection scheme
Two sleep modes:
– Processor idle
– Deep sleep -1.0 µA (1.5 µA with optional
32.768-kHz oscillator enabled)
Seventeen GPIO pins with alternate functions
Two Serial Controllers with DMA
– SC1: I
2
C master, SPI master, UART
– SC2: I
2
C master, SPI master/slave
Two 16-bit general-purpose timers; one 16-bit
sleep timer
Watchdog timer and power-on-reset circuitry
Non-intrusive debug interface (SIF)
Integrated AES encryption accelerator
Integrated ADC module first-order, sigma-delta
converter with 12-bit resolution
Integrated 1.8V voltage regulator
■
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■
■
■
■
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October 2007
Rev 3
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www.st.com
1
Contents
SN250
Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Top-level functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1
5.2
5.3
5.4
5.5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Environmental characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
RF electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.5.1
5.5.2
5.5.3
Receive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Transmit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Synthesizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6
Functional description—system modules . . . . . . . . . . . . . . . . . . . . . . 20
6.1
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6.1.1
6.1.2
6.2.1
6.2.2
Receive (RX) path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
RX baseband . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
RSSI and CCA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
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Transmit (TX) path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
TX baseband . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
TX_ACTIVE signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.3
6.4
6.5
6.6
Integrated MAC module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Packet Trace Interface (PTI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
XAP2b microprocessor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Embedded memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.6.1
6.6.2
6.6.3
6.6.4
6.6.5
Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Simulated EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Flash Information Area (FIA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
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SN250
Contents
6.7
6.8
6.9
6.10
Encryption accelerator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Reset detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Power-on-Reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Clock sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6.10.1
6.10.2
6.10.3
High-frequency crystal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Low-frequency oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Internal RC oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6.11
6.12
6.13
6.14
Random number generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Sleep timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7
Functional description—application modules . . . . . . . . . . . . . . . . . . . 31
7.1
7.2
GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
7.1.1
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Serial controller SC1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
7.2.1
7.2.2
7.2.3
7.2.4
UART mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
SPI master mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
I2C master mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
7.3
Serial controller SC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
7.3.1
7.3.2
7.3.3
SPI modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
I2C Master Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
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7.4.1
7.4.2
7.4.3
7.4.4
7.4.5
7.4.6
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General purpose timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Clock sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Timer functionality (counting) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Timer functionality (output compare) . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Timer functionality (input capture) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Timer interrupt sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
7.5
7.6
ADC module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
7.5.1
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Event manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
7.6.1
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
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Contents
SN250
7.7
Integrated voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
8
9
10
11
12
13
14
SIF module programming and debug interface . . . . . . . . . . . . . . . . . 117
Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Register address table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Abbreviations and acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
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SN250
General description
1
General description
The SN250 is a single-chip solution that integrates a 2.4GHz, IEEE 802.15.4-compliant
transceiver with a 16-bit XAP2b microprocessor. It contains integrated Flash and RAM
memory and peripherals of use to designers of ZigBee®-based applications.
The transceiver utilizes an efficient architecture that exceeds the dynamic range
requirements imposed by the IEEE 802.15.4-2003 standard by over 15dB. The integrated
receive channel filtering allows for co-existence with other communication standards in the
2.4GHz spectrum such as IEEE 802.11g and Bluetooth. The integrated regulator, VCO, loop
filter, and power amplifier keep the external component count low. An optional high
performance radio mode (boost mode) is software selectable to boost dynamic range by a
further 3dB.
The XAP2b microprocessor is a power-optimized core integrated in the SN250. It supports
two different modes of operation—System Mode and Application Mode. The ZNet stack
runs in System Mode with full access to all areas of the chip. Application code runs in
Application Mode with limited access to the SN250 resources; this allows for the scheduling
of events by the application developer while preventing modification of restricted areas of
memory and registers. This architecture results in increased stability and reliability of deployed
solutions.
The SN250 has 128KB of embedded Flash memory and 5KB of integrated RAM for data
and program storage. The SN250 software stack employs an effective wear-leveling
algorithm in order to optimize the lifetime of the embedded Flash.
To maintain the strict timing requirements imposed by ZigBee and the IEEE 802.15.4-2003
standard, the SN250 integrates a number of MAC functions into the hardware. The MAC
hardware handles automatic ACK transmission and reception, automatic backoff delay, and
clear channel assessment for transmission, as well as automatic filtering of received
packets. In addition, the SN250 allows for true MAC level debugging by integrating the
Packet Trace Interface.
To support user-defined applications, a number of peripherals such as GPIO, UART, SPI,
I
2
C, ADC, and general-purpose timers are integrated. Also, an integrated voltage regulator,
power-on-reset circuitry, sleep timer, and low-power sleep modes are available. The deep
sleep mode draws less than 1μA, allowing products to achieve long battery life.
Finally, the SN250 utilizes the non-intrusive SIF module for powerful software debugging
and programming of the XAP2b microcontroller.
Target applications for the SN250 include:
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Building automation and control
Home automation and control
Home entertainment control
Asset tracking
The SN250 is purchased with ZNet, a ZigBee-compliant software stack developed by Ember
Corporation, providing a ZigBee profile-ready, platform-compliant solution.This technical
datasheet details the SN250 features available to customers using it with the ZNet stack.
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