TFT-LCD Supplies + DVR + V
COM
Amplifier
ISL98665
The ISL98665 is an integrated power management IC (PMIC) for
TFT-LCDs used in notebooks, tablet PCs, and monitors. The device
integrates a boost converter for generating AVDD, an LDO for
V
LOGIC
, and a second boost converter for V
GH
. VGL is generated
by a charge pump driven by the switch node of the AVDD boost.
The ISL98665 also includes a high performance V
COM
amplifier
and a V
COM
calibrator, with integrated EEPROM.
The AVDD boost converter features a 2.5A FET with adjustable
switching frequency ranging from 310kHz to 1.2MHz. The
soft-start time and compensation are adjustable by external
components.
V
GH
boost converter features a 1.2A FET and temperature
compensation.
The LDO is able to deliver 360mA for driving the voltage rail
required by external digital circuitry.
The ISL98665 provides a 7-bit resolution, current sink V
COM
calibrator with I
2
C interface, and a V
COM
amplifier. The output
of the V
COM
is powered up with the voltage at the last
programmed EEPROM setting.
Features
• 2.2V to 5.5V input
• 2.5A, 0.15
Ω
integrated AVDD boost FET
• 1.2A integrated boost for up to 37.5V V
GH
with temperature
compensation
• LDO able to deliver 360mA
• Adjustable boost switching frequency from 310kHz to
1.2MHz
• Integrated high output current V
COM
amplifier
• DVR (digital variable resistor)
- Wiper position stored in 7-bit nonvolatile memory and
recalled on power-up
- Endurance, 1,000 data changes per bit
• UVLO, OVP, OCP, and OTP protection
• 28 Ld, 4x5mm TQFN package
• Pb-Free (RoHS compliant)
Applications
• LCD Notebook, Tablet, and Monitor
Pin Configuration
ISL98665
(28 LD 4x5 TQFN)
TOP VIEW
PGND4
PGND3
SDA
24
SCL
23
22 SS
21 RSET
20 NC
19 VGH
THERMAL
PAD
18 AGND2
17 RNTC
16 COMP2
15 FBP
9
POS
10
NEG
11
VOUT
12
PGND1
13
PGND2
14
LXP
LX2
28
COMP
1
LX1
27
26
25
FB 2
FREQ 3
AGND1 4
EN 5
VIN 6
LOUT 7
AVDD
8
June 27, 2013
FN8564.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Copyright Intersil Americas LLC 2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL98665
Table of Contents
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Application/Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Typical Performance Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Frequency Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AVDD Boost Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Soft-Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
GH
Boost Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
GH
Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Boost Component Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Rectifier Diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linear Regulator (LDO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VCOM Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I2C Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protocol Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Write Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Read Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ISL98665 DVR Memory Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Register Description: Access Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Register Description: IVR and WR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Initial V
COM
Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Determination of RSET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Determination of R1 and R2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Final Transfer Function for DVR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VGL Charge Pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Fault Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
overCURRENT PROTECTION (OCP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OVERVOLTAGE PROTECTION (OVP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OVER-Temperature PROTECTION (OtP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power On/OFF Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
10
10
10
10
10
11
11
11
11
12
12
12
12
13
13
14
14
14
15
15
15
17
18
18
19
19
19
19
19
19
19
19
Layout Recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Power-ON/OFF Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2
FN8564.0
June 27, 2013
ISL98665
Application/Block Diagram
VIN
C1
C2
LX1
LX2
R5
C10
VIN
C11
LDO
CONTROLLER
AVDD BOOST
CONTROLLER
L1
D1
AVDD
C6
C22
C7
EN
R22
R18
PGND3
PGND4
D3
C23
Z1
VGL
C20
VLOGIC
C12
VLOGIC
R17
RNTC
LOUT
FB
SS
RNTC
COMP
FREQ
LXP
OSC
AVDD
C13
VGH
BOOST
CONTROLLER
R2
C24
R1
C9
R3
AVDD
R18
AVDD
L2
C15
D2
R28
AVDD
R11
VGH
R15
C17
POS
VOUT
DVR
NEG
PGND1
RSET
R8
VCOM
PGND2
R12
FBP
R14
C25
R16
COMP2
VGH
C21
SCL
EEPROM
REGISTER
SDA
AGND1
AGND2
THERMAL PAD
NOTE: Component designators in this Application Diagram match with the evaluation board schematic.
3
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June 27, 2013
ISL98665
Pin Descriptions
PIN#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25, 26
27, 28
SYMBOL
COMP
FB
FREQ
AGND1
EN
VIN
LOUT
AVDD
POS
NEG
VOUT
PGND1
PGND2
LXP
FBP
COMP2
RNTC
AGND2
VGH
NC
RSET
SS
SCL
SDA
PGND3,
PGND4
LX1, LX2
Thermal
PAD
DESCRIPTION
AVDD boost converter compensation pin. Connect a series resistor and capacitor between this pin and AGND to optimize
transient response and stability. For more information refer to “Compensation” on page 12.
AVDD boost converter feedback. Connect to the center of a voltage divider between AVDD and AGND to set the AVDD voltage.
For more information refer to “AVDD Boost Operation” on page 10.
Boost Converter frequency adjustment pin. Connect this pin with a resistor to AGND set the boost frequency. Refer to “Switching
Frequency Selection” on page 10 for more information.
Analog ground 1.
IC enable pin. Enables all the ISL98665 outputs.
IC input supply and LDO input. Need to connect decoupling capacitor close to VIN pin.
LDO output. Connect at least one 1µF capacitor to GND for stable operation.
DVR and V
COM
amplifier voltage analog supply. Place a 0.47µF capacitor close to the AVDD pin.
V
COM
Amplifier Non-inverting input.
V
COM
Amplifier Inverting input.
V
COM
Amplifier output.
V
COM
Amplifier ground.
VGH power ground.
VGH boost converter switching node.
VGH boost converter feedback. Connect to the center of a voltage divider between VGH and AGND to set the VGH voltage. Refer
to “V
GH
Boost Operation” on page 10 for more information.
VGH boost converter compensation pin. Connect a series resistor and capacitor between this pin and AGND to optimize
transient response and stability. Refer to “Compensation” on page 12 for more information.
Temperature Compensation pin. Refer to “V
GH
Temperature Compensation” on page 11 for the connection of this pin.
Analog ground 2.
Power supply for EEPROM programming; VGH OVP sensing pin.
Not connected.
DVR sink current adjustment pin; connect a resistor between this pin and AGND to set the resolution of the DVR output voltage.
AVDD Boost Converter Soft-Start. Connect a capacitor between this pin and GND to set the soft-start time. Refer to “Soft-Start”
on page 10 for more information.
I
2
C clock high impedance input.
I
2
C bidirectional data high impedance input/open-drain output.
AVDD boost power ground.
AVDD boost converter switching node 1 and 2.
Connect to ground plane on PCB to maximize thermal performance.
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL98665IRTZ
ISL98665IRT-EVZ
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin
plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL98665
For more information on MSL please see techbrief
TB363.
PART MARKING
98665 IRTZ
TEMP RANGE
(°C)
-40 to +105
28 Ld 4x5 TQFN
PACKAGE
(Pb-free)
PKG.
DWG. #
L28.4x5C
ISL98665 Evaluation Board
4
FN8564.0
June 27, 2013
ISL98665
Absolute Maximum Ratings
VGH and LXP to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +45V
LX1, LX2, AVDD, POS, NEG, and VOUT to AGND . . . . . . . . . . -0.3 to +18V
Voltage Between AGND and PGND. . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.5V
All Other Pins to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0V
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . 2kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 200V
Charged Device Model (Tested per JESD22-C101). . . . . . . . . . . . . . . 1kV
Latch Up (Tested per JESD78; Class II, Level A) . . . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance (Typical)
θ
JA
(°C/W)
θ
JC
(°C/W)
28 Ld 4x5 TQFN Package (Notes 4, 5). . . .
39
9
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Lead Temperature During Soldering . . . . . . . . . . . . . . . . . . . . . . . . +260°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Operating Temperature . . . . . . . . . . . . . . . . . . . .-40°C to +105°C
Supply Voltage
V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2V to 5.5V
AVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Up to 16V
V
GH
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Up to 37.5V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379.
5. For
θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
V
IN
= EN = 3.3V, AVDD = 8V, VLDO = 1.89V, VGH = 21V.
T
A
= +25°C, unless otherwise specified.
Boldface
limits apply over the operating temperature range, -40°C to +105°C.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
UNITS
GENERAL
V
IN
I
S_DIS
I
S
I
EN
V
IN
Supply Voltage Range
V
IN
Supply Currents when Disabled
V
IN
Supply Currents
Enable Pin Current
V
IN
< UVLO
EN = 3.3V, overdrive AVDD and V
GH
EN = 3.3V
2.2
3.3
390
1.3
3
5.5
500
1.6
V
µA
mA
µA
LOGIC INPUT CHARACTERISTICS
V
IL
V
IH
R
IL
Low Voltage Threshold
High Voltage Threshold
Pull-Down Resistor
EN, SCL, SDA
EN, SCL, SDA
EN
1.2
0.75
1.15
1.55
0.60
V
V
MΩ
INTERNAL OSCILLATOR
F
OSC
Switching Frequency
FREQ resistor = 10kΩ
FREQ resistor = 20kΩ
1.1
550
1.2
600
1.3
650
MHz
kHz
AVDD BOOST REGULATOR
AVDD_RNG
DAVDD/
DIOUT
DAVDD/
DV
IN
V
FB
I
FB
r
DS(ON)_AVDD
I
LIM_AVDD
AVDD Output Voltage Range
AVDD Load Regulation
AVDD Line Regulation
AVDD Feedback Voltage
Input Bias Current
Switch ON-resistance
Switch Current Limit
2.0
10mA < I
LOAD
< 250mA, T
A
= +25°C
I
LOAD
= 150mA, 2.2V < V
IN
< 5.5V, T
A
= +25°C
I
LOAD
= 100mA
FB pin
150
2.5
1.188
1.1*V
IN
0.2
0.2
1.200
1.212
200
190
3.0
16
V
%
%
V
nA
mΩ
A
5
FN8564.0
June 27, 2013
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