AUTOMOTIVE GRADE
AUIRFR1018E
HEXFET
®
Power MOSFET
V
DSS
R
DS(on)
60V
7.1m
8.4m
79A
56A
Features
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
typ.
max.
I
D (Silicon Limited)
I
D (Package Limited)
D
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to
achieve extremely low on-resistance per silicon area. Additional
features of this design are a 175°C junction operating temperature,
fast switching speed and improved repetitive avalanche rating .
These features combine to make this design an extremely efficient
and reliable device for use in Automotive applications and a wide
variety of other applications.
G
S
D-Pak
AUIRFR1018E
G
Gate
D
Drain
S
Source
Base part number
AUIRFR1018E
Package Type
D-Pak
Standard Pack
Form
Quantity
Tube
75
Tape and Reel Left
3000
Orderable Part Number
AUIRFR1018E
AUIRFR1018ETRL
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
I
DM
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Package Limited)
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited)
Avalanche Current
Repetitive Avalanche Energy
Pead Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Max.
79
56
56
315
110
0.76
± 20
88
47
11
21
-55 to + 175
300
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Symbol
R
JC
R
JA
R
JA
Parameter
Junction-to-Case
Junction-to-Ambient ( PCB Mount)
Junction-to-Ambient
Typ.
–––
–––
–––
Max.
1.32
50
110
Units
°C/W
HEXFET® is a registered trademark of Infineon.
*Qualification
standards can be found at
www.infineon.com
1
2015-11-19
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
V
(BR)DSS
V
(BR)DSS
/T
J
Breakdown Voltage Temp. Coefficient
R
DS(on)
Static Drain-to-Source On-Resistance
V
GS(th)
Gate Threshold Voltage
gfs
Forward Trans conductance
R
G(Int)
Internal Gate Resistance
I
DSS
I
GSS
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
AUIRFR1018E
Min. Typ. Max. Units
Conditions
60
––– –––
V V
GS
= 0V, I
D
= 250µA
––– 0.073 ––– V/°C Reference to 25°C, I
D
= 5mA
–––
7.1
8.4
m V
GS
= 10V, I
D
= 47A
2.0
–––
4.0
V V
DS
= V
GS
, I
D
= 100µA
110 ––– –––
S V
DS
= 50V, I
D
= 47A
––– 0.73 –––
––– –––
20
V
DS
= 60V, V
GS
= 0V
µA
––– ––– 250
V
DS
= 48V,V
GS
= 0V,T
J
=125°C
––– ––– 100
V
GS
= 20V
nA
––– ––– -100
V
GS
= -20V
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Min.
–––
–––
–––
–––
–––
–––
–––
–––
46
10
12
34
13
35
55
46
2290
270
130
390
630
69
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
I
D
= 47A
V
DS
= 30V
nC
V
GS
= 10V
V
DD
= 39V
I
D
= 47A
ns
R
G
= 10
V
GS
= 10V
V
GS
= 0V
V
DS
= 50V
pF
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 48V
V
GS
= 0V, V
DS
= 0V to 48V
Conditions
MOSFET symbol
showing the
A
integral reverse
p-n junction diode.
V T
J
= 25°C,I
S
= 47A,V
GS
= 0V
T
J
= 25°C
ns
T
J
= 125°C V
R
= 51V,
T
J
= 25°C
I
F
= 47A
nC
T
J
= 125°C di/dt = 100A/µs
A T
J
= 25°C
Dynamic Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Total Gate Charge
Q
g
Q
gs
Gate-to-Source Charge
Q
gd
Gate-to-Drain Charge
Q
sync
Total Gate Charge Sync. (Q
g
- Q
gd
)
t
d(on)
Turn-On Delay Time
Rise Time
t
r
t
d(off)
Turn-Off Delay Time
Fall Time
t
f
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
C
oss eff.
(ER) Effective Output Capacitance (Energy Related)
C
oss eff.
(TR) Effective Output Capacitance (Time Related)
Diode Characteristics
Parameter
Continuous Source Current
I
S
(Body Diode)
Pulsed Source Current
I
SM
(Body Diode)
V
SD
Diode Forward Voltage
t
rr
Reverse Recovery Time
Q
rr
Reverse Recovery Charge
Typ. Max. Units
–––
–––
–––
26
31
24
35
1.8
79
315
1.3
39
47
36
53
–––
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 56A. Note that current
limitations arising from heating of the device leads may occur with some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction temperature.
Limited by T
Jmax ,
starting T
J
= 25°C, L = 0.08mH, R
G
= 25, I
AS
= 47A, V
GS
=10V. Part not recommended for use above this value.
I
SD
47A, di/dt
1668A/µs, V
DD
V
(BR)DSS
, T
J
175°C.
Pulse width
400µs;
duty cycle
2%.
C
oss eff
. (TR) is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss eff
. (ER) is a fixed capacitance that gives the same energy as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
R
is
measured at T
J
approximately 90°C.
2
2015-11-19
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
AUIRFR1018E
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
100
BOTTOM
BOTTOM
4.5V
10
10
4.5V
60µs
PULSE WIDTH
Tj = 25°C
1
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
60µs
PULSE WIDTH
Tj = 175°C
1
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig. 1
Typical Output Characteristics
R DS(on) , Drain-to-Source On Resistance
(Normalized)
1000
Fig. 2
Typical Output Characteristics
2.5
ID = 47A
VGS = 10V
2.0
ID, Drain-to-Source Current(A)
100
TJ = 175°C
10
1.5
1
TJ = 25°C
VDS = 25V
1.0
60µs
PULSE WIDTH
0.1
2
3
4
5
6
7
8
9
0.5
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig. 3
Typical Transfer Characteristics
4000
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Fig. 4
Normalized On-Resistance vs. Temperature
16
VGS, Gate-to-Source Voltage (V)
ID= 47A
VDS = 48V
VDS = 30V
VDS = 12V
3000
C, Capacitance (pF)
12
C iss
2000
8
1000
4
C oss
C rss
1
10
VDS , Drain-to-Source Voltage (V)
100
0
0
0
10
20
30
40
50
60
QG Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
3
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
2015-11-19
1000
AUIRFR1018E
10000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS (on)
ISD , Reverse Drain Current (A)
1000
100
TJ = 175°C
100
1msec
100µsec
10
TJ = 25°C
10
LIMITED BY PACKAGE
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1
1
VGS = 0V
0.1
0.0
0.5
1.0
1.5
2.0
VSD , Source-to-Drain Voltage (V)
1
DC
10
100
0.1
VDS , Drain-toSource Voltage (V)
80
LIMITED BY PACKAGE
60
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
Fig. 7
Typical Source-to-Drain Diode Forward Voltage
Fig 8.
Maximum Safe Operating Area
80
Id = 5mA
ID, Drain Current (A)
75
40
70
20
65
0
25
50
75
100
125
150
175
TC, Case Temperature (°C)
60
-60 -40 -20 0 20 40 60 80 100 120 140160 180
TJ , Temperature ( °C )
Fig. 9
Maximum Drain Current vs. Case Temperature
0.8
Fig 10.
Drain-to-Source Breakdown Voltage
400
EAS, Single Pulse Avalanche Energy (mJ)
350
300
250
200
150
100
50
0
25
50
75
100
0.6
ID
TOP
5.3A
11A
BOTTOM
47A
Energy (µJ)
0.4
0.2
0.0
0
10
20
30
40
50
60
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting TJ, Junction Temperature (°C)
Fig. 11
Typical C
OSS
Stored Energy
4
Fig 12.
Maximum Avalanche Energy vs. Drain Current
2015-11-19
10
AUIRFR1018E
Thermal Response ( Z thJC )
1
D = 0.50
0.20
R
1
R
1
J
1
2
R
2
R
2
R
3
R
3
3
R
4
R
4
C
1
2
3
4
4
C
Ri (°C/W)
J
i
(sec)
0.000007
0.000091
0.000843
0.005884
0.1
0.10
0.05
0.02
0.01
0.026741
0.28078
0.606685
0.406128
0.01
Ci=
iRi
Ci=
iRi
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Tj
= 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)
0.01
10
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14.
Typical Avalanche Current Vs. Pulse width
100
EAR , Avalanche Energy (mJ)
80
TOP
Single Pulse
BOTTOM 10% Duty Cycle
ID = 47A
60
40
20
0
25
50
75
100
125
150
175
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.infineon.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as T
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 13, 14).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
T/
Z
thJC
I
av
= 2T/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Starting TJ , Junction Temperature (°C)
Fig 15.
Maximum Avalanche Energy Vs. Temperature
5
2015-11-19
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