S i 8 2 2 0 /2 1
0 . 5
A N D
2 . 5 A
M P
I S O
D R I V ER S W I T H
O
PT O
I
N P UT
(2.5, 3.75,
AND
5.0
K
V
RMS
)
Features
Functional upgrade for HCPL-0302,
HCPL-3120, TLP350, and similar
opto-drivers
60 ns propagation delay max
(independent of input drive current)
14x tighter part-to-part matching
versus opto-drivers
2.5, 3.75, and 5.0 kV
RMS
isolation
Under-voltage lockout protection with
hysteresis
Resistant to temperature and aging
effects
Gate driver supply voltage
6.5 V to 24 V
AEC-Q100 qualification
Pin Assignments:
See page 20
Wide operating range
–40
Transient Immunity
30 kV/µs
Narrow Body SOIC
NC
8
V
DD
1
ANODE
2
7
V
O
CATHODE
6
V
O
3
NC
4
5
V
SS
Top View
to +125 °C
narrow body
wide body
CATHODE
NC
NC
RoHS-compliant packages
SOIC-8
SOIC-16
Wide Body SOIC
1
2
3
4
5
6
7
8
Top View
Applications
IGBT/ MOSFET gate drives
Industrial control systems
Switch mode power supplies
UPS systems
Motor control drives
Inverters
ANODE
NC
NC
CATHODE
NC
Safety Regulatory Approvals
16
15
14
13
12
11
10
9
V
SS
V
DD
NC
V
O
NC
NC
NC
V
SS
UL 1577 recognized
Up
VDE certification conformity
60747-5-5 (VDE 0884 Part 5)
EN 60950-1 (reinforced insulation)
IEC
to 5000 Vrms for 1 minute
CSA component notice 5A
approval
IEC
CQC certification approval
GB4943.1
Patent pending
60950-1, 61010-1, 60601-1
(reinforced insulation)
Description
The Si8220/21 is a high-performance functional upgrade for opto-coupled
drivers, such as the HCPL-3120 and the HPCL-0302 providing 2.5 A of
peak output current. It utilizes Silicon Laboratories' proprietary silicon
isolation technology, which provides a choice of 2.5, 3.75, or 5.0 kV
RMS
withstand voltages per UL1577. This technology enables higher
performance, reduced variation with temperature and age, tighter part-to-
part matching, and superior common-mode rejection compared to opto-
isolated drivers. While the input circuit mimics the characteristics of an
LED, less drive current is required, resulting in increased efficiency.
Propagation delay time is independent of input drive current, resulting in
consistently short propagation time, tighter unit-to-unit variation, and
greater input circuit design flexibility.
Rev. 1.5 5/15
Copyright © 2015 by Silicon Laboratories
Si8220/21
Si8220/21
Functional Block Diagram
NC
ISOLATOR
Semiconductor-Based
Isolation Barrier
LED
Emulator
VDD
ANODE
RF
Transmitter
VO
RF
Receiver
UV
Lockout
CATHODE
VO
VSS
NC
Si8220/21
2
Rev. 1.5
Si8220/21
T
ABLE
Section
OF
C
ONTENTS
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Test Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
3. Regulatory Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1. Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5. Technical Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
5.1. Device Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
5.2. Device Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
5.3. Under Voltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6. Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.1. Power Supply Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.2. Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.3. Power Dissipation Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
6.4. Input Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.5. Parametric Differences between Si8220/21 and HCPL-0302 and HCPL-3120
Opto Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7. Pin Descriptions (Narrow-Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
8. Pin Descriptions (Wide-Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
9. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
10. Package Outline: 8-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
11. Land Pattern: 8-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
12. Package Outline: 16-Pin Wide Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
13. Land Pattern: 16-Pin Wide-Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
14. Top Marking: 16-Pin Wide Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
15. Top Marking: 8-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Rev. 1.5
3
Si8220/21
1. Electrical Specifications
Table 1. Electrical Characteristics
1
V
DD
= 12 V or 15 V, V
SS
= GND, T
A
= –40 to +125 °C; typical specs at 25 °C.
Parameter
DC Specifications
Power Supply Voltage
Input Current (ON)
Input Current Rising Edge
Hysteresis
Input Voltage (OFF)
Symbol
Test Conditions
Min
Typ
Max
Units
V
DD
I
F(ON)
I
HYS
V
F(OFF)
(V
DD
– V
SS
)
6.5
5.0
—
—
—
0.5
—
24
20
—
1.6
V
mA
mA
V
Measured at ANODE with
respect to CATHODE.
Measured at ANODE with
respect to CATHODE.
I
F
= 5 mA.
0.5 A devices
–
0.6
Input Forward Voltage
V
F
1.7
—
—
—
—
—
—
—
—
—
—
15
2.7
5.0
1.0
0.3
1.5
0.5
2.5
V
DD
–
0.5
V
DD
–
0.1
2.5
—
—
—
—
—
V
Output Resistance High (Source)
R
OH
2.5 A devices
0.5 A devices
Output Resistance Low (Sink)
R
OL
2.5 A devices
(0.5 A), I
F
= 0
(see Figure 2)
Output High Current (Source)
I
OH
A
(2.5 A), I
F
= 0
(see Figure 2)
(0.5 A), I
F
= 10 mA,
(see Figure 1)
—
—
A
(2.5 A), I
F
= 10 mA,
(see Figure 1)
(0.5 A), I
OUT
= –50 mA
—
—
V
(2.5 A), I
OUT
= –50 mA
Output Low Current (Sink)
I
OL
High-Level Output Voltage
V
OH
Low-Level Output Voltage
High-Level Supply Current
Low-Level Supply Current
V
OL
(0.5 A), I
OUT
= 50 mA
(2.5 A), I
OUT
= 50 mA
Output open I
F
= 10 mA
Output open
V
F
= –0.6 to +1.6 V
—
200
50
—
mV
—
—
1.2
1.4
—
—
mA
mA
Notes:
1.
VDD = 12 V for 5, 8, and 10 V UVLO devices; VDD = 15 V for 12.5 V UVLO devices.
2.
See "9.Ordering Guide" on page 22 for more information.
4
Rev. 1.5
Si8220/21
Table 1. Electrical Characteristics (Continued)
1
V
DD
= 12 V or 15 V, V
SS
= GND, T
A
= –40 to +125 °C; typical specs at 25 °C.
Parameter
Input Reverse Voltage
Input Capacitance
VDD Undervoltage Threshold
2
5 V Threshold
8 V Threshold
10 V Threshold
12.5 V Threshold
VDD Undervoltage Threshold
2
5 V Threshold
8 V Threshold
10 V Threshold
12.5 V Threshold
VDD Lockout Hysteresis
VDD Lockout Hysteresis
VDD Lockout Hysteresis
AC Specifications
Propagation Delay Time to High
Output Level
Propagation Delay Time to Low
Output Level
Output Rise and Fall Time
Symbol
BV
R
C
IN
VDD
UV+
Test Conditions
I
R
= 10 mA.
Measured at ANODE with
respect to CATHODE.
Min
0.5
—
Typ
—
10
Max
—
—
Units
V
pF
V
DD
rising
See Figure 9 on page 15.
See Figure 10 on page 15.
See Figure 11 on page 15.
See Figure 12 on page 15.
5.20
7.50
9.60
12.4
5.80
8.60
11.1
13.8
6.30
9.40
12.2
14.8
V
V
V
VDD
UV–
V
DD
falling
See Figure 9 on page 15.
See Figure 10 on page 15.
See Figure 11 on page 15.
See Figure 12 on page 15.
4.90
7.20
9.40
11.6
—
—
—
5.52
8.10
10.1
12.8
280
600
1000
6.0
8.70
10.9
13.8
—
—
—
mV
mV
mV
V
V
V
VDD
HYS
VDD
HYS
VDD
HYS
UVLO voltage = 5 V
UVLO voltage = 8 V
UVLO voltage = 10 V or
12.5 V
t
PLH
t
PHL
t
R
, t
F
t
START
CMTI
C
L
= 200 pF
C
L
= 200 pF
(0.5 A), C
L
= 200 pF
(2.5 A), C
L
= 200 pF
Time from
V
DD
= V
DD_UV+
to V
O
Input ON or OFF
V
CM
= 1500 V (see Figure 3)
—
—
—
—
—
—
—
—
—
—
—
30
60
40
30
ns
ns
ns
20
40
—
µs
kV/µs
Device Startup Time
Common Mode
Transient Immunity
Notes:
1.
VDD = 12 V for 5, 8, and 10 V UVLO devices; VDD = 15 V for 12.5 V UVLO devices.
2.
See "9.Ordering Guide" on page 22 for more information.
Rev. 1.5
5
51单片机
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
