Low Cost Dual Balanced
Line Receiver ICs
THAT
1290, 1293, 1296
FEATURES
• Good CMRR: typ. 50 dB at 60Hz
• Low cost, self-contained, dual
• Excellent audio performance
– Wide bandwidth: typ. >7.6 MHz
– High slew rate: typ. 14 V/μs
– Low distortion: typ. 0.0006% THD
– Low noise: typ. -104 dBu
• Low current: typ. 3 mA (per amplifier)
• Several gains: 0 dB, ±3 dB, ±6 dB
• Current Shunt Monitors
APPLICATIONS
• Balanced Audio Line Receivers
• Instrumentation Amplifiers
• Differential Amplifiers
• Precision Summers
Description
The THAT 1290 series of precision differen-
tial amplifiers was designed primarily for use as
balanced line receivers for audio applications.
Gains of 0 dB, ±3 dB, and ±6 dB are available to
suit various applications requirements.
These devices include on-board precision
thin-film resistors which offer good matching and
excellent tracking due to their monolithic
construction. Manufactured in THAT Corpora-
tion’s proprietary complementary dielectric isola-
tion (DI) process, the 1290 series provides the
sonic benefits of discrete designs with the
simplicity, reliability, matching, and small size of
a fully integrated solution.
All three versions of the part typically exhibit
50 dB of common-mode rejection. With 14 V/μs
slew rate, 7.6 MHz or higher bandwidth, and
0.0006% THD, these devices are sonically trans-
parent. Moreover, current consumption is
typically a low 6 mA (3 mA per amplifier).
The 1290 series is available in a 16-pin
QSOP package.
Pin Name
Ref A Out A Sns A
16
15
R
4
R
2
R
2
R
4
14
V
CC
13
Sns B Out B Ref B
12
11
10
9
NC
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
N/C
IN- A
IN+ A
V
EE
IN+ B
IN- B
R
3
R
1
1
NC
2
In- A
3
In+ A
4
V
EE
R
1
R
3
N/C
N/C
N/C
NC
5
In+ B
6
In- B
7
NC
8
REF B
OUT B
SENSE B
V
CC
SENSE A
OUT A
REF A
Part No.
THAT1290
THAT1293
THAT1296
Gain
0 dB
-3 dB
-6 dB
R
1
& R
3
R
2
& R
4
Figure 1. Equivalent circuit
Table 1. Pin assignments
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com
Copyright © 2008, THAT Corporation
Document 600121 Rev 01
Document 600121 Rev 01
Page 2 of 10
THAT 1290 Series
Low Cost Dual Balanced Line Receivers
SPECIFICATIONS
1
Absolute Maximum Ratings
2,3
Supply Voltages (V
CC
- V
EE
)
Maximum In- or In+ Voltage
Max/Min Ref or Sense Voltage
Maximum Output Voltage (V
OM
)
40V
-50V + V
CC
, +50V + V
EE
V
CC
+0.5V, V
EE
-0.5V
V
CC
+0.5V, V
EE
-0.5V
Storage Temperature Range (T
ST
)
Operating Temperature Range (T
OP
)
Output Short-Circuit Duration (t
SH
)
Junction Temperature (T
J
)
-40 to +125 ºC
-40 to +85 ºC
Continuous
+125 ºC
Electrical Characteristics
2,4
Parameter
Supply Current
Supply Voltage
Input Voltage Range
Symbol
I
CC
; -I
EE
V
CC
-V
EE
V
IN-DIFF
Differential (equal and opposite swing)
1290 (0dB gain)
1293 (-3dB gain)
1296 (-6dB gain)
Common Mode
1290 (0dB gain)
1293 (-3dB gain)
1296 (-6dB gain)
Differential
1290 (0dB gain)
1293 (-3dB gain)
1296 (-6dB gain)
Common Mode
All versions
Common Mode Rejection Ratio CMRR
Matched source impedances
DC, V
CM
= ±10V
60Hz
20kHz
Power Supply Rejection Ratio
6
Total Harmonic Distortion
Output Noise
PSRR
THD
e
OUT
±3V to ±18V; V
CC
= -V
EE
; all gains
40
40
—
—
50
50
50
90
—
—
—
—
dB
dB
dB
dB
—
—
—
—
18
21
24
18
—
—
—
—
kΩ
kΩ
kΩ
kΩ
Conditions
No signal
Min
—
6
—
—
—
—
—
—
Typ
6
—
21.5
24.5
27.5
27.5
29.1
31
Max
8
36
—
—
—
—
—
—
Units
mA
V
dBu
dBu
dBu
dBu
dBu
dBu
V
IN-CM
Input Impedance
5
Z
IN-DIFF
Z
IN-CM
V
out
= 5Vrms, f = 1kHz, BW = 22kHz, R
L
= 2 kΩ
—
22 Hz to 22kHz bandwidth
1290 (0dB gain)
1293 (-3dB gain)
1296 (-6dB gain)
—
—
—
—
0.0006
—
%
-104
-105.5
-107
14
—
—
—
—
dBu
dBu
dBu
V/μs
Slew Rate
SR
R
L
= 2kΩ; C
L
= 200 pF, all gains
1. All specifications are subject to change without notice.
2. Unless otherwise noted, T
A
=25ºC, V
CC
=+15V, V
EE
= -15V.
3. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; the functional operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not impli ed. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
4. 0 dBu = 0.775 Vrms.
5. Absolute resistance values can vary ±30% from the typical values shown. Input impedance is monitored by lot sampling.
6. Defined with respect to differential gain.
7. Parameter guaranteed over the entire range of power supply and temperature.
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com
Copyright © 2008, THAT Corporation
THAT 1290 Series
Low Cost Dual Balanced Line Receivers
Page 3 of 10
Document 600121 Rev 01
Electrical Characteristics (con’t)
2,4
Parameter
Small signal bandwidth
Symbol
BW
-3dB
Conditions
R
L
= 2kΩ; C
L
= 10 pF
1290 (0dB gain)
1293 (-3dB gain)
1296 (-6dB gain)
Min
—
—
—
-0.2
R
L
= 2kΩ; C
L
= 200 pF
R
L
= 2kΩ; C
L
= 200 pF
No signal
R
L
= 0
Ω
V
CC
-3
—
-10
—
—
f = 1kHz
—
Typ
7.6
9.6
11.6
0
V
CC
-2
V
EE
+2
—
±42
—
120
Max
—
—
—
0.2
—
V
EE
+3
10
—
200
—
Units
MHz
MHz
MHz
dB
V
V
mV
mA
pF
dB
Output Gain Error
Output Voltage Swing
G
ER-OUT
V
O+
V
O-
V
OFF
I
SC
C
L
Output Offset Voltage
Output Short Circuit Current
Capacitive Load
7
Channel Separation
Differential Input
In-
V
CC
~
V
IN(DIFF)
In-
R
1
Sns
In+
Out
Common-mode Input
In-
In+
C
L
R
3
R
4
Ref
R
L
V
EE
~
V
IN(CM)
In+
Figure 2. Simplified test circuit (1/2 of 129x shown)
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com
Copyright © 2008, THAT Corporation
Document 600121 Rev 01
Page 4 of 10
THAT 1290 Series
Low Cost Dual Balanced Line Receivers
Theory of Operation
The THAT 1290 series ICs consist of two high
performance opamps with integrated, thin-film resis-
tors. These designs take advantage of THAT’s fully
complementary dielectric isolation (DI) process to
deliver excellent performance with low current
consumption. The devices are simple to apply in a
wide range of applications.
50 V below V
EE
. Thus, the protection networks
protect the devices without constraining the allow-
able signal swing at the input pins. The reference
(and sense) pins are protected via more conventional
reverse-biased diodes which will conduct if these
pins are raised above V
CC
or below V
EE
.
To reduce risk of damage from ESD, and to
prevent RF from reaching the devices, THAT recom-
mends the circuit of Figure 4. C
3
through C
5
should
be located close to the point where the input signal
comes into the chassis, preferably directly on the
connector. The unusual circuit design is intended to
minimize the unbalancing impact of differences in
the values of C
4
and C
5
by forcing the capacitance
from each input to chassis ground to depend primar-
ily on the value of C
3
. The circuit shown is approxi-
mately ten times less sensitive to mismatches
between C
4
and C
5
than the more conventional
approach in which the junction of C
4
and C
5
is
grounded directly. An excellent discussion of input
stage grounding can be found in the June 1995 issue
of the Journal of the Audio Engineering Society, Vol.
43, No. 6, in articles by Stephen Macatee, Bill
Whitlock, and others.
Note that because of the tight matching of the
internal resistor ratios, coupled with the uncertainty
in absolute value of any individual resistor, RF
bypassing through the addition of R-C networks at
the inputs (series resistor followed by a capacitor to
ground at each input) is not recommended. The
added resistors can interact with the internal ones in
unexpected ways. If some impedance for the
RF-bypass capacitor to work against is deemed
necessary, THAT recommends the use of a ferrite
bead or balun instead.
If it is necessary to ac-couple the inputs of the
1290-series parts, the coupling capacitors should be
sized to present negligible impedance at any frequen-
cies of interest for common mode rejection. Regard-
less of the type of coupling capacitor chosen,
variations in the values of the two capacitors,
working against the 1290-series input impedance,
V
CC
C2
In-
100n
C4
470p
C5
470p
2/6
In-
13
V
CC
Resistor Matching, Values, and CMRR
The 1290-series devices rely upon the inherent
matching of silicon-chromium (Si-Cr), thin-film,
integrated resistors to achieve a 50 dB common
mode rejection ratio and tight gain accuracy. No
trimming is performed. As a result of their
monolithic construction, the R
3
/R
4
ratio matches
within ±0.5% of the R
1
/R
2
ratio. 0.5% matching is
about 50 dB CMRR for the 1296 and 52 dB for the
1290.
However, while the resistor ratios are tightly
controlled, the actual value of any individual resistor
is not. Lot-to-lot variations of up to ±30% are to be
expected.
If higher CMRR is required in a simple dual
input stage, consider the THAT 1280-series ICs.
These parts are laser-trimmed to improve the inher-
ent precision of our thin-film resistor process. For
demanding applications in which the source imped-
ance balance may be less than perfect, the 1200-
series ICs offer exceptional CMRR performance via a
patented method of increasing common-mode input
impedance.
Input Considerations
The 1290-series devices are internally protected
against input overload via an unusual arrangement of
diodes connecting the + and - input pins to the
power supply pins. The circuit of Figure 3 shows the
arrangement used for the R
3
/R
4
side; a similar one
applies to the other side. The zener diodes prevent
the protection network from conducting until an
input pin is raised at least 50 V above V
CC
or lowered
-
V
CC
+
V
CC
C3
In+
R
3
R
4
Ref
47p
14/12
Sens
15/11
Out
Ref
V
EE
3/5
16/10
In+
4
Out
In+
C1
100n
V
EE
V
EE
V
EE
Figure 3. Representative input protection circuit
U1
THAT
1296/
1293/
1290
Figure 4. RFI and supply bypassing
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com
Copyright © 2008, THAT Corporation
THAT 1290 Series
Low Cost Dual Balanced Line Receivers
Page 5 of 10
Document 600121 Rev 01
can unbalance common mode input signals. This can
convert common-mode to balanced signals which will
not be rejected by the CMRR of the devices. For this
reason, THAT recommends dc-coupling the inputs of
the 1290-series devices.
(2V
CC
- 4) V, and the minimum is (2V
EE
+ 4) V. For
the 1293, these figures are (2.4V
CC
- 4.8) V, and
(2.4V
EE
+ 4.8) V. For the 1296, these figures are
(3V
CC
- 6) V, and (3V
EE
+ 6) V.
Therefore, for common-mode signals and ±15 V
rails, the 1290 will accept up to ~26 V in either
direction. As an ac signal, this is 52 V peak-peak,
18.4 V rms, or +27.5 dBu. With the same supply
rails, the 1293 will accept up to ~31 V in either
direction. As an ac signal, this is 62 V peak-peak,
21.9 V rms, or +29 dBu. With the same supply rails,
the 1296 will accept up to ~39 V in either direction.
As an ac signal, this is 78 V peak-peak, 27.6 V rms,
or +31 dBu.
Of course, in the real world, differential and
common-mode signals combine. The maximum
signal that can be accommodated will depend on the
superposition of both differential and common-mode
limitations.
Input Voltage Limitations
The 1290 series devices are capable of accepting
input signals above the power supply rails. This is
because the internal opamp’s inputs connect to the
outside world only through the on-chip resistors R
1
through R
4
at nodes a and b as shown in Figure 2.
Consider the following analysis.
Differential Input Signals
For differential signals (v
IN(DIFF)
), the limitation to
signal handling will be output clipping. The outputs
of all the devices typically clip at within 2V of the
supply rails. Therefore, maximum differential input
signal levels are directly related to the gain and
supply rails and can be calculated in dBu as follows:
V CC
−V
EE
−2V
2
2
Output Considerations
The 1290-series devices are typically capable of
supplying 42 mA into a short circuit. While they will
survive a short, power dissipation will rise dramati-
cally if the output is shorted. Junction temperature
must be kept under 125 ºC to maintain the devices’
specifications.
These devices are stable with up to 200 pF of
load capacitance over the entire rated temperature
range, and even more at room temperature.
V
in(diff)
=
20 log
or
0.775
−
Gain
V
in(diff)
=
20 log(V
CC
−
V
EE
−
4V)
−
Gain
−
6.8dB
For example, If V
CC
=15V, V
EE
=-15V, and
Gain
= -3 dB, then
V
in(diff)
=
20 log[15V
− (−15V) −
4V]
− (−3dB) −
6.8dB
= 24.5 dBu
Power Supply Considerations
The 1290-series parts are not particularly sensi-
tive to the power supply, but they
do
contain wide
bandwidth opamps. Accordingly, small local bypass
capacitors should be located within a few inches of
the supply pins on these parts, as shown in Figure 4.
Common-Mode Input Signals
For common-mode input signals, there is essen-
tially no output signal. The limitation on common-
mode handling is the point at which the inputs are
overloaded. So, we must consider the inputs of the
opamp.
For common-mode signals (V
IN(CM)
), the common-mode
input current splits to flow through both R
1
/R
2
and through
R
3
/R
4
. Because V
b
is constrained to follow V
a
, we will
consider only the voltage at node a.
The voltage at a can be calculated as:
Selecting a Gain Variation
The three different parts offer different gain
structures to suit different applications. The 1296 is
customarily configured for -6 dB gain, but by revers-
ing the resistor connections, it can also be configured
for +6 dB. The 1293 is most often configured for
-3 dB gain, but can also be configured for +3 dB.
The choice of input gain is determined by the input
voltage range to be accommodated, and the power
supply voltages used within the circuit.
To minimize noise and maximize signal-to-noise
ratio, the input stage should be selected and config-
ured for the highest possible gain that will ensure
that maximum-level input signals will not clip the
input stage or succeeding stages. For example, with
±18 V supply rails, the 1290-series parts have a
maximum output signal swing of +23 dBu. In order
to accommodate +24 dBu input signals, the
maximum gain for the stage is -1 dB. With ±15 V
supply rails, the maximum output signal swing is
~+21.1 dBu; here, -3 dB is the maximum gain. In
each case, a 1293 configured for -3 dB gain is the
ideal choice. The 1290 (0 dB gain only) will not
V
a
=
V
IN(CM)
R
4
R
3
+R
4
Solving for v
IN(CM)
,
V
IN(CM)
=
V
a
R
3
+R
4
R
4
For the 1290, (R
3
+ R
4
) /R
4
= 2. For the 1293,
(R
3
+ R
4
) /R
4
= 2.4. For the 1296, (R
3
+ R
4
) /R
4
= 3.
Furthermore, the same constraints apply to v
a
as in
the differential analysis.
Following the same reasoning as above, the
maximum common-mode input signal for the 1290 is
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com
Copyright © 2008, THAT Corporation
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