19-4569; Rev 1; 6/10
VGA Port Protector
General Description
The MAX4895E integrates level-translating buffers and
features R, G, B port protection for VGA signals.
The MAX4895E has H, V (horizontal, vertical) translat-
ing buffers that take low-level CMOS inputs from the
graphics outputs to meet full +5.0V, TTL-compatible
outputs. Each output can drive ±10mA and meet the
VESA
®
specification. In addition, the device takes the
+5.0V, direct digital control (DDC) signals and trans-
lates them to the lower level required by the graphics
device. This level is set by the user by connecting V
L
to
the graphics output supply. The R, G, B terminals pro-
tect the graphics output pins against electrostatic dis-
charge (ESD) events. All seven outputs have high-level
ESD protection.
The MAX4895E is specified over the extended -40°C to
+85°C temperature range, and is available in a 16-pin,
3mm x 3mm TQFN package.
±15kV—Human Body Model
±8kV—IEC 61000-4-2, Contact Discharge
♦
Low Quiescent Current, I
Q
≤
5µA (max)
♦
Low 3pF (max) Capacitance (R, G, B Ports)
♦
DDC Level-Shifting Protection and Isolation
♦
Horizontal Sync, Vertical Sync Level Shifting/
Buffering
♦
Input Compatible with V
L
♦
Output Full +5.0V TTL Compatible (per VESA)
♦
±10mA Drive on Each H, V Terminal
♦
Space-Saving, Lead-Free, 16-Pin (3mm x 3mm)
TQFN Package
Features
♦
ESD Protection on H1, V1, SDA1, SCL1, R, G, and B
MAX4895E
Applications
Notebook Computers
Desktops
Servers
Graphics Cards
Ordering Information
PART
MAX4895EETE+
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
16 TQFN-EP*
VESA is a registered service mark of Video Electronics
Standards Association Corporation.
+Denotes
a lead(Pb)-free/RoHS-compliant package.
*EP
= Exposed pad.
Typical Operating Circuit
+3.3V
+5V
1μF
1μF
V
L
EN
VGA OUTPUTS
2
2
H0, V0
MAX4895E
V
CC
VGA PORT
H1, V1
2
2
SDA0, SCL0
R
G
B
GND
SDA1, SCL1
N.C.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
VGA Port Protector
MAX4895E
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.)
V
CC
........................................................................-0.3V to +6.0V
V
L
.............................................................-0.3V to +(V
CC
+ 0.3V)
R, G, B, H1, V1, SCL1, SDA1...................-0.3V to +(V
CC
+ 0.3V)
EN, H0, V0, SCL0, SDA0 ............................-0.3V to +(V
L
+ 0.3V)
Continuous Current through SDA_, SCL_.........................±30mA
Continuous Short-Circuit Current H1, V1..........................±20mA
Continuous Power Dissipation (T
A
= +70°C) for multilayer board:
16-Pin TQFN (derate 20.8mW/°C above +70°C) .......1667mW
Junction-to-Case Thermal Resistance (θ
JC
) (Note 1) ......7°C/W
Junction-to-Ambient Thermal Resistance (θ
JA
)
(Note 1) ........................................................................48°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CC
= +4.5V to +5.5V, V
L
= +2.0V to V
CC
, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
= +5.0V,
V
L
= +3.3V, and T
A
= +25°C.) (Note 2)
PARAMETER
SUPPLY OPERATION
Supply Voltage
Logic Supply Voltage
V
CC
Supply Current
V
L
Supply Current
RGB CHANNELS
R, G, B Capacitance
R, G, B Leakage
H_, V_, EN CHANNELS
Input Threshold Low
Input Threshold High
Input Hysteresis
Input Leakage Current
Output-Voltage Low
Output-Voltage High
Propagation Delay
Enable Time
SDA_, SCL_ (DDC) CHANNELS
On-Resistance, SDA, SCL
Leakage Current, SDA, SCL
R
ON
I
LEAK
V
CC
= +5.5V, I
SDA, SCL
= ±10mA,
V
SDA, SCL
= +0.5V
V
L
= 0V
-1
20
55
+1
μA
V
IL
V
IH
V
HYST
I
LEAK
V
OL
V
OH
t
PD
t
ON
, t
OFF
V
L
= +3.3V, V
CC
= +5.5V
I
OUT
= 10mA sink, V
CC
= +4.5V
I
OUT
= 10mA source, V
CC
= +4.5V
R
L
= 2.2k , C
L
= 10pF, V
OL
= +0.8V,
V
OH
= +2.4V
2.4
15
15
-1
V
L
= +3.0V
V
L
= +3.6V
2.0
100
+1
0.8
0.8
V
V
mV
μA
V
V
ns
ns
C
OUT
f = 1MHz, V
R,G,B
= 1V
P-P
(Note 3)
V
CC
= +5.5V
-1
2.2
+1
pF
μA
V
CC
V
L
I
CC
I
L
V
L
V
CC
V
H0
, V
V0
= 0V, V
EN
= V
L
V
H0
, V
V0
= 0V, V
EN
= V
L
(no load)
4.5
2
3.3
0.5
0.5
5.5
5.5
5.0
5.0
V
V
μA
μA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
VGA Port Protector
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +4.5V to +5.5V, V
L
= +2.0V to V
CC
, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
= +5.0V,
V
L
= +3.3V, and T
A
= +25°C.) (Note 2)
PARAMETER
ESD PROTECTION
SDA1, SCL1, H1, V1, R, G, B
SDA1, SCL1, H1, V1, R, G, B
Human Body Model (Note 4)
IEC 61000-4-2 Contact
±15
±8
kV
kV
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX4895E
Note 2:
All devices are 100% production tested at T
A
= +25°C. All temperature limits are guaranteed by design.
Note 3:
Guaranteed by design, not production tested.
Note 4:
Tested terminals to GND; 1µF bypass capacitors on V
CC
and V
L
.
Typical Operating Characteristics
(V
CC
= +5.0V, V
L
= +3.3V, and T
A
= +25°C, unless otherwise noted.)
HV BUFFER OUTPUT-VOLTAGE
HIGH vs. TEMPERATURE
MAX4895E toc01
R
ON
vs. V
SDA0
60
SDA0, SCL0 ARE
INTERCHANGEABLE
45
R
ON
(Ω)
V
L
= +3.3V
30
T
A
= +85°C
T
A
= +25°C
15
T
A
= -40°C
V
L
= +5V
T
A
= +85°C
T
A
= +25°C
T
A
= -40°C
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
V
SDA0
(V)
4.0
-40
6.0
I
OUT
= 8mA
5.5
OUTPUT VOLTAGE (V)
5.0
4.5
-15
10
35
60
85
TEMPERATURE (°C)
HV BUFFER OUTPUT-VOLTAGE
LOW vs. TEMPERATURE
I
OUT
= 8mA
0.8
OUTPUT VOLTAGE (V)
MAX4895E toc03
1.0
0.6
0.4
0.2
0
-40
-15
10
35
60
85
TEMPERATURE (°C)
_______________________________________________________________________________________
MAX4895E toc02
3
VGA Port Protector
MAX4895E
Pin Configuration
SCL1
10
SCL0
9
8
7
SDA1
SDA0
N.C.
V
L
6
EP
2
G
3
B
4
GND
5
TOP VIEW
H1
12
V0 13
V1 14
V
CC
15
EN 16
11
H0
MAX4895E
+
1
R
TQFN
(3mm
×
3mm)
Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
—
NAME
R
G
B
GND
V
L
N.C.
SDA0
SDA1
SCL0
SCL1
H0
H1
V0
V1
V
CC
EN
EP
High-ESD Protection Diodes for RGB Signals
High-ESD Protection Diodes for RGB Signals
High-ESD Protection Diodes for RGB Signals
Ground
Supply Voltage, +2.0V to V
CC
. Bypass V
L
to GND with a 1μF ceramic capacitor.
No Connection. Leave unconnected.
SDA I/O. SDA0 referenced to V
L
.
SDA I/O. SDA1 referenced to V
CC
.
SCL I/O. SCL0 referenced to V
L
.
SCL I/O. SCL1 referenced to V
CC
.
Horizontal Sync Input
Horizontal Sync Output
Vertical Sync Input
Vertical Sync Output
Power-Supply Voltage, +4.5V to +5.5V. Bypass V
CC
to GND with a 1μF ceramic capacitor.
Enable for H1 and V1 Outputs
Exposed Pad. Connect EP to GND or leave unconnected. For enhanced thermal dissipation,
connect EP to a copper area as large as possible. Do not use EP as a sole ground connection.
FUNCTION
4
_______________________________________________________________________________________
VGA Port Protector
Functional Diagram
V
L
V
CC
MAX4895E
SDA0
CLAMP
±15kV
SDA1
SCL0
±15kV
SCL1
H0
±15kV
H1
EN
V0
±15kV
V1
R
±15kV
G
±15kV
B
±15kV
MAX4895E
GND
Applications Information
The MAX4895E provides the level shifting necessary to
drive two standard VGA ports from a graphics controller
as low as +2.2V. Internal buffers drive the HSYNC and
VSYNC signals to VGA standard TTL levels. The DDC
switch provides level shifting by clamping signals to a
diode drop less than V
L
(see the
Typical Operating
Circuit).
Connect V
L
to +3.3V for normal operation.
Power-Supply Decoupling
Bypass V
CC
and V
L
to ground with a 1µF ceramic
capacitor as close as possible to the device.
PCB Layout
High-speed switches such as the MAX4895E require
proper PCB layout for optimum performance. Ensure
that impedance-controlled PCB traces for high-speed
signals are matched in length and are as short as pos-
sible. Connect the exposed pad to a solid ground
plane.
_______________________________________________________________________________________
5
无线连接
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
