Latch-up Current..................................................... > 200 mA
Operating Range
Range
Industrial
Automotive-A
Automotive-E
Ambient
Temperature
–40°C to +85°C
–40°C to +85°C
–40°C to +125°C
V
CC
2.7V to 3.6V
Electrical Characteristics
Over the Operating Range
-55
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
Description
Test Conditions
Min. Typ.
[3]
2.4
0.4
2.2
–0.5
GND < V
I
< V
CC
GND < V
O
< V
CC
, Output Disabled
I
OUT
= 0 mA,
V
CC
= 3.6V Ind’l
f = f
MAX
= 1/t
RC
,
Auto-A/
CMOS Levels
Auto-E
I
OUT
= 0 mA,
f = 1 MHz,
CMOS Levels
I
SB1
Automatic CE
Power-down
Current—CMOS
Inputs
Automatic CE
Power-down
Current—CMOS
Inputs
Ind’l
Auto-A/
Auto-E
100
–1
–1
7
V
CC
+
0.5V
0.8
+1
+1
20
2.2
–0.5
–1
–1
7
7
1
2
1
1
Max.
Output HIGH Voltage V
CC
= 2.7V, I
OH
= –1.0 mA
Output LOW Voltage V
CC
= 2.7V, I
OL
= 2.1 mA
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Current
Output Leakage
Current
V
CC
Operating
Supply
Current
2.4
0.4
V
CC
+
0.5V
0.8
+1
+1
15
15
2
2
100
100
1
15
1
1
1
15
15
20
µA
µA
mA
-70
Min. Typ.
[3]
Max.
Unit
V
V
V
V
µA
µA
mA
CE > V
CC
– 0.3V, V
CC
= 3.6V Ind’l
V
IN
> V
CC
– 0.3V
Auto-A/
or V
IN
< 0.3V,
Auto-E
f = f
MAX
CE > V
CC
– 0.3V V
CC
= 3.6V Ind’l/
V
IN
> V
CC
– 0.3V
Auto-A
or V
IN
< 0.3V,
f=0
Auto-E
I
SB2
Capacitance
[5]
Parameter
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
T
A
= 25°C, f = 1 MHz,
V
CC
= V
CC(typ)
Max.
6
8
Unit
pF
pF
Thermal Resistance
[5]
Parameter
Θ
JA
Θ
JC
Description
Test Conditions
TSOPII
60
22
Unit
°C/W
°C/W
Thermal Resistance (Junction to Ambient) Still Air, soldered on a 4.25 x 1.125 inch,
Thermal Resistance (Junction to Case) 2-layer printed circuit board
Notes:
4. V
IL
(min.) = –2.0V for pulse durations less than 20 ns.
5. Tested initially and after any design or process changes that may affect these parameters.
Document #: 001-06497 Rev. *A
Page 3 of 11
[+] Feedback
CY62137VN MoBL
®
AC Test Loads and Waveforms
R1
V
CC
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
R2
V
CC
OUTPUT
5 pF
INCLUDING
JIG AND
SCOPE
R2
R1
V
CC
Typ
10%
GND
Rise Time:
1 V/ns
ALL INPUT PULSES
90%
90%
10%
Fall Time:
1 V/ns
(a)
(b)
Equivalent to:
THÉVENIN EQUIVALENT
R
TH
OUTPUT
V
TH
(c)
Parameters
R1
R2
R
TH
V
TH
Value
1105
1550
645
1.75
Unit
Ohms
Ohms
Ohms
Volts
Data Retention Characteristics
(Over the Operating Range)
Parameter
V
DR
I
CCDR
Description
V
CC
for Data Retention
Data Retention Current
V
CC
= 1.0V, CE > V
CC
– 0.3V,
V
IN
> V
CC
– 0.3V or V
IN
< 0.3V;
No input may exceed V
CC
+ 0.3V
Ind’l/Auto-A
Auto-E
0
t
RC
Conditions
Min.
1.0
0.5
7.5
10
ns
ns
Typ.
[3]
Max.
Unit
V
µA
t
CDR[5]
t
R
Chip Deselect to Data
Retention Time
Operation Recovery Time
Data Retention Waveform
DATA RETENTION MODE
V
CC
V
CC
(min.)
t
CDR
V
DR
> 1.0 V
V
CC
(min.)
t
R
CE
Document #: 001-06497 Rev. *A
Page 4 of 11
[+] Feedback
CY62137VN MoBL
®
Switching Characteristics
Over the Operating Range
Parameter
Read Cycle
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
t
HZOE
t
LZCE
t
HZCE
t
PU
t
PD
t
DBE
t
LZBE (9)
t
HZBE
Write Cycle
[10, 11]
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
SD
t
HD
t
HZWE
t
LZWE
t
BW
Write Cycle Time
CE LOW to Write End
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
WE Pulse Width
Data Set-up to Write End
Data Hold from Write End
WE LOW to High-Z
[7, 8]
WE HIGH to Low-Z
[7]
BHE / BLE LOW to End of Write
5
50
55
45
45
0
0
40
25
0
20
10
60
70
60
60
0
0
50
30
0
25
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low-Z
[7]
OE HIGH to High-Z
[7, 8]
CE LOW to Low-Z
[7]
CE HIGH to High-Z
[7, 8]
CE LOW to Power-up
CE HIGH to Power-down
BHE / BLE LOW to Data Valid
BHE / BLE LOW to Low-Z
BHE / BLE HIGH to High-Z
5
25
0
55
55
5
25
10
25
0
70
70
5
25
10
25
10
55
25
5
25
55
55
10
70
35
70
70
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Description
[6]
55 ns
Min.
Max.
Min.
70 ns
Max.
Unit
Notes:
6. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input levels of 0 to V
CC
typ., and output loading of the specified
I
OL
/I
OH
and 30 pF load capacitance.
7. At any given temperature and voltage condition, t
HZCE
is less than t
LZCE
, t
HZOE
is less than t
LZOE
, and t
HZWE
is less than t
LZWE
for any given device.
8. t
HZOE
, t
HZCE
, and t
HZWE
are specified with C
L
= 5 pF as in (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
9. If both byte enables are toggled together this value is 10 ns.
10. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can
terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
11. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of t
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