TS823/824/825 Series
Microprocessor Supervisory Circuit
with Watchdog Timer & Manual Reset
SOT-25
General Description
The TS823/824/825 family allows the user to customize the CPU monitoring function without any external
components. The user has a large choice of reset voltage thresholds and output driver configurations, all of which are
present ant the factory. Each wafer is trimmed to the customer’s specifications.
These circuits will ignore fast negative going transients on Vdd. The state of the reset output is guaranteed to be
correct down to 1V. After Vdd crosses above a factory present threshold, the TS823/824/825 assert a reset signal.
After a predetermined time (the “reset” interval) the reset is deasserted. If Vdd ever drops below the threshold voltage
a reset is asserted immediately. In addition to a supply monitoring function the TS823/824/825 also monitor transitions
at the watchdog (WDI) input. If a logic transition does not occur at the WDI pin within a certain time interval (the
“watchdog” interval) then a reset is asserted. The reset deasserts after the reset interval, as explained earlier.
The TS823/824/825 can both assert a reset manually by pulling the MR input to ground, and the micro-power
quiescent current make this family a natural for portable battery powered equipment.
Features
●
●
●
●
●
●
●
●
Precision monitoring of +3V, +3.3V and +5V power
supply voltage
Tight voltage threshold tolerance +/-1.5%
Fully specified over temperature
210mS min. power-on reset pulse width
3uA(typ) supply current
Guaranteed reset valid to Vdd = +1V
Power supply transient immunity
No external components
Ordering Information
Part No.
Package
Packing
TS823CX5x RF
SOT-25
3Kpcs / 7” Reel
TS824CX5x RF
SOT-25
3Kpcs / 7” Reel
TS825CX5x RF
SOT-25
3Kpcs / 7” Reel
Note:
x
is the threshold voltage type, option as
A
: 4.63V
B
: 4.38V
D
: 3.08V
E
: 2.93V
F
: 2.63V
G
: 2.32V
H
: 2.19V
Contact factory for additional voltage option
Pin Descriptions
Function
RESET (Active-Low)
Ground
Manual Reset
(RESET) (Active-High)
Watchdog Input
Supply Voltage (Vdd)
Applications
●
●
●
●
●
●
Computers and Controllers
Embedded Controllers
Intelligent instruments
Critical uP monitoring
Portable / Battery powered equipment
Automotive Systems
TS823
1
2
3
-
4
5
TS824
1
2
-
3
4
5
TS825
1
2
4
3
-
5
Absolute Maximum Rating
Parameter
Supply Voltage
Supply Voltage - Recommended
Operating Junction Temperature Range
Storage Temperature Range
Thermal Resistance
o
Symbol
Vdd
Vdd
T
OP
T
STG
Θjc
Maximum
6.0
0.9 ~ 5
-40 ~ +125
-65 ~ +150
256
Unit
V
V
o
C
o
C
C/W
S
o
Maximum Lead Temperature (260 C)
T
LEAD
10
Notes: Stress above the listed absolute rating may cause permanent damage to the device.
1/8
Version: B07
TS823/824/825 Series
Microprocessor Supervisory Circuit
with Watchdog Timer & Manual Reset
Electrical Specifications
(Ta = 25
o
C, unless otherwise noted)
Parameter
Input Supply Voltage
Supply Current
WDI and MRB unconnected
TS823/824/825CX5A
TS823/824/825CX5B
TS823/824/825CX5D
Reset Threshold
TS823/824/825CX5E
TS823/824/825CX5F
TS823/824/825CX5G
TS823/824/825CX5H
RESET Output Voltage Low
(RESET) Output Voltage High
Vdd to Reset Delay
Reset Active Timeout Period
Watchdog Timeout Period
WDI Pulse Width
WDI Input Threshold
WDI Input Current
MR Input Threshold
MR Pulse Width
MR Noise Immunity
MR to Reset Delay
MR Pull Up Resistance
Input Supply Voltage
Vdd = V
TH
x 1.2
W
DI
=0V
W
DI
=Vdd = 5V
Vdd=V
TH
x 1.2
Vdd<V
TH(MIN),
I
SINK
=1.2mA,
Vdd>
VTH(MAX),
I
SOURCE
=0.5mA
Vdd =V
TH
- 100mV
o
o
Ta=-40 C ~+85 C
V
OL
V
OH
T
D1
T
D2
T
WD
T
WDI
W
DIIL
W
DIIH
I
IL
I
IH
M
RIL
M
RIH
T
WMR
Pulse width with no reset
Vdd = V
TH
- 100mV
Ta=-40 C~+85 C
o
o
Conditions
Symbol
Vdd
Idd
Min
1.0
--
4.56
4.31
3.03
Typ
--
3
4.63
4.38
3.08
2.93
2.63
2.32
2.19
--
--
40
210
1760
--
--
--
-8
8
--
--
--
100
500
--
--
Max
5.5
10
4.7
4.45
3.13
2.97
2.67
2.36
2.23
0.5
--
--
280
2400
--
0.7
--
0.7
15
0.7
--
--
--
--
120
5.5
Unit
V
uA
V
TH
2.89
2.59
2.28
2.15
--
0.8 Vdd
--
140
1120
50
--
0.8 Vdd
-15
--
--
0.8 Vdd
1
--
--
80
1.0
V
V
V
uS
mS
mS
nS
V
V
uA
uA
V
V
uS
nS
nS
KΩ
V
T
DMR
V
CC
Detail Description
Pin Function
Pin Name
Reset
GND
(Reset)
MR
Pin Description
Active Low
Ground
Active High
This pin is active low. Pulling this pin low to forces a reset. After a low to high transition reset remains
asserted for exactly one reset timeout period. This pin is internally pulled high. If this function is unused
then float this pin or tie it to Vdd.
Watch Dog Input. Any transition on this pin will reset the Watch Dog timer. If this pin remains high or
low for longer than the Watch Dog interval then a reset is asserted. Float or tri-state this pin to disable
the Watch Dog feature.
Positive power supply. A reset is asserted after this voltage drops below a predetermined level. After
Vdd rises above that level reset remains asserted until the end of the reset timeout period.
WDI
Vdd
2/8
Version: B07
TS823/824/825 Series
Microprocessor Supervisory Circuit
with Watchdog Timer & Manual Reset
Application Information
The TS823/824/825 are designed to interface with the reset input of a microprocessor and to prevent CPU execution
errors due to power up, power down, and other power supply errors. The TS823/824 also monitor the CPU health by
checking for signal transitions form the CPU at the WDI input.
Reset Output
Active low reset outputs are denoted as RESET, Active high reset output are denoted as (RESET),
A reset will be asserted if any of three things happen:
1. Vdd drops below the threshold (Vth)
2. The MR pin is pulled low.
3. The WDI pin does not detect a transition within the Watch Dog interval (TWD)
The reset will remain asserted for the prescribed reset interval after:
1. Vdd rises above the threshold (Vth)
2. MR goes high
3. The Watch Dog timer have timed out causing the reset to assert.
Manual Reset Input
The TS823 and TS825 feature a manual reset feature (MR). A logic low on the MR pin asserts a reset. The reset
remains asserted a long as the MR pin remains low. After the MR pin transitions to a high state the reset remains
asserted for the prescribed reset interval (TD2). The MR pin is internally pulled up to Vdd by a 100KΩ resistor. It is
internally de-bounced to reject switching transients.
The MR pin is ESD protected by diodes connected to Vdd and Gnd. So the MR pin should never be driven higher than
Vdd or lower than Gnd.
Watchdog Input
The TS823 and TS824 are equipped with a watchdog input (WDI). If the microprocessor does not produce a valid logic
edge at the watchdog input (WDI) within the prescribed watchdog interval (TWD) then a reset asserts. The reset
remains asserted for the required reset interval (TD2). Ata the end of the reset interval the reset is deasserted and the
watchdog interval timer starts again from zero.
If the watchdog input is left unconnected or is connected to a tri-stated buffer the watchdog function is disabled. As
soon as the WDI input is driven either low or high the watchdog function resumes with the watchdog timer set to zero.
Watchdog Input Current
The watchdog input pin (WDI) typically sources/sinks 8uA when driven high or low. So from a power dissipation point
of view the duty cycle of the waveform at WDI is unimportant. When the WDI pin is floating or tri-stated the power
supply current fall to less than 3uA.
Glitch Rejection
The TS823/824/825 family will reject negative going transients on the Vdd line to some extent. The smaller the
duration of the transient the larger its amplitude may be without triggering a reset. The “Glitch Rejection” chart in the
graphs section of this datasheet shows the relation between glitch amplitude and allowable glitch duration to avoid
unintended resets.
Accurate Output State at Low Vdd
With Vdd voltage on the order of the MOS transistor threshold (<1V) the outputs of the TS823/824/825 may become
undefined. For parts with active low output RESET a resistor placed between RESET and Gnd on the order of 100KΩ
will ensure that the RESET output stays low when Vdd is lower than the threshold voltage of the part. In a like manner
a resistor on the order of 100KΩ when placed between (RESET) and Vdd will ensure parts with active high output
(RESET) will remain high when Vdd is lower than the threshold voltage of the parts.
3/8
Version: B07
TS823/824/825 Series
Microprocessor Supervisory Circuit
with Watchdog Timer & Manual Reset
Reset Timing Diagram
Reset Timing Diagram
4/8
Version: B07
TS823/824/825 Series
Microprocessor Supervisory Circuit
with Watchdog Timer & Manual Reset
Electrical Characteristics Curve
Figure 1. Glitch Rejection
Figure 2. Reset Time vs. Temperature
Figure 3. Iin vs. Temperature
Figure 4. Reset Vth vs. Temperature
Figure 5. Reset VOL vs. Temperature
5/8
Version: B07
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