Preliminary
TS4270
5V Ultra Low Dropout Fixed Voltage Regulator
TO-220-5L
TO-263-5L
2
(D PAK)
TO-252-5L
(DPAK)
Pin Definition:
1. Input
2. Reset Output
3. Ground
4. Reset Delay
5. Output
General Description
This device is a 5V low-drop fixed-voltage regulator. The maximum input voltage is 42V (65V,
≤
400 ms). Up to an
input voltage of 26V and for an output current up to 550mA it regulates the output voltage within a 2% accuracy. The
short circuit protection limits the output current of more than 650mA. The device incorporates over voltage protection
and temperature protection that disables the circuit at un-permissibly high temperatures.
Features
●
●
●
●
●
●
●
●
●
●
●
Output Voltage tolerance
≤±2%
Low-drop Voltage
Integrated Over Temperature Protection
Reverse Polarity Protection
Input Voltage up to 42V
Over Voltage Protection up to 65V (≤400mS)
Short-Circuit Proof
Suitable for use in Automotive Electronics
Wide Temperature Range
Adjustable Reset Time
ESD Protection > 4KV
Ordering Information
Part No.
TS4270CZ550 C0
TS4270CM550 RN
TS4270CP550 RO
Package
TO-220-5L
TO-263-5L
TO-252-5L
Packing
50pcs / Tube
800pcs / 13” Reel
2.5kpcs / 13” Reel
Absolute Maximum Rating
(T
J
=-40~150
o
C)
Parameter
Input Voltage
Input Voltage (t
≤
400mS)
Operating Input Voltage Range
Reset Output Voltage
Reset Delay Voltage
Output Voltage
Ground Current
Storage Temperature Range
Junction Temperature Range
Symbol
V
I
V
I
V
I
V
R
V
D
V
O
I
GND
T
ST
T
J
Limit
42
65
6 to 42
-0.3 to 7
-0.3 to 7
-1.0 to 16
-0.5
-50 to +150
-40 to +150
Unit
V
V
V
V
V
V
A
o
o
C
C
Thermal Information
Parameter
Thermal Resistance* (Junction to Case)
Thermal Resistance* (Junction to Ambient)
TO-263-5L
t <1mS
TO-263-5L
Symbol
RӨ
JC
ZӨ
JC
RӨ
JA
Maximum
3
2
65
Unit
K/W
K/W
1/9
Version: A07
Preliminary
TS4270
5V Ultra Low Dropout Fixed Voltage Regulator
Electrical Specifications
(V
IN
=13.5V, -40
o
C≤ T
J
≤150
o
C, unless otherwise noted)
Parameter
Output Voltage
Output Voltage
Output Current Limit
Current Consumption (I
q
= I
I
– I
O
)
Current Consumption (I
q
= I
I
– I
O
)
Current Consumption (I
q
= I
I
– I
O
)
Dropout Voltage (Note 1)
Load Regulation
Line Regulation
Power Supply Ripple Rejection
Symbol
V
OUT
V
OUT
I
Qmax
I
q
I
q
I
q
V
DR
Test Condition
5mA
≤I
Q
≤
550mA, 6V
≤V
I
≤
26V
I
Q
≤
300mA: 26V
≤V
I
≤
36V
V
O
=0V
I
O
=5mA,
I
O
=550mA,
I
O
=550mA, V
I
=5V
I
O
=550mA
Min
4.90
4.90
650
--
--
--
--
--
--
--
Typ
5
5
850
1
55
70
350
25
12
54
Max
5.10
5.10
--
1.5
75
90
700
50
25
--
Unit
V
V
mA
mA
mA
mA
mV
mV
mV
dB
REG
LOAD
I
O
= 5~550mA, V
I
= 6V
REG
LINE
I
O
= 5mA, V
I
= 6~26V
PSRR
f=100Hz, V
r
=0.5V
SS
Reset Generator
Parameter
Switching Threshold
Reset High Voltage
Reset Low Voltage (Note 2)
Reset Low Voltage
Reset Pull-up
Lower Reset Timing Threshold
Charge Current
Upper Timing Threshold
Delay Time
Reset Reaction Time
Symbol
V
RT
V
ROH
V
ROL
V
ROL
R
V
DRL
I
d
V
DU
td
t
RR
Test Condition
Min
4.5
4.5
–
–
18
0.2
8
1.4
–
–
Typ
4.65
–
60
200
30
0.45
14
1.8
13
–
Max
4.8
–
–
400
46
0.8
25
2.3
–
3
Unit
V
V
mV
mV
kΩ
V
uA
V
ms
us
R
intern
=30kΩ, 1V≤ V
O
≤4.5V
I
R
=3mA, V
O
=4.4V
Internally Connected to Output
V
O
< V
RT
V
D
=1V
C
D
=100nF
C
D
=100nF
Over Voltage Protection
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
42
44
46
V
Turn-off Voltage
V
L, OV
Note:
1. Drop voltage = V
IN
- V
OUT
(measured when the output voltage has dropped 100 mV from the nominal value obtained
at 13.5 V input)
2. Reset peak is always lower than 1.0 V.
Pin Definitions and Functions
Pin Symbol
Function
1
2
3
4
5
Input
Reset Output
GND
Reset Delay
Output
Block to ground directly on the IC with ceramic capacitor
The open collector output is connected to the 5 V output via an integrated resistor of 30 kW
Internally connected to heatsink
Connect a capacitor to ground for delay time adjustment
5V, block to ground with 22 mF capacitor ESR, < 3W
2/9
Version: A07
Preliminary
TS4270
5V Ultra Low Dropout Fixed Voltage Regulator
Block Diagram
Application Description
The IC regulates an input voltage in the range of 5.5V < V
I
<36V to V
Onom
= 5.0V Up to 26V it produces a regulated
output current of more than 550mA. Above 26V the save-operating-area protection allows operation up to 36V with a
regulated output current of more than 300mA. Over voltage protection limits operation at 42V. The over voltage
protection hysteresis restores operation if the input voltage has dropped below 36V. A reset signal is generated for an
output voltage of V
O
<4.5V. The delay for power-on reset can be set externally with a capacitor.
Design Notes for External Components
An input capacitor C
I
is necessary for compensation of line influences. The resonant circuit consisting of lead
inductance and input capacitance can be damped by a resistor of approx.1Ω Win series with C
I
. An output capacitor C
O
is necessary for the stability of the regulating circuit. Stability is guaranteed at values of C
O
≥
22uF and ESR of < 3Ω.
Circuit Description
The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a
voltage that is proportional to the output voltage and drives the base of a series transistor via a buffer. Saturation
control as a function of the load current prevents any over-saturation of the power element. If the output voltage
decreases below 4.5V, an external capacitor C
D
on pin 4 (Reset Delay) will be discharged by the reset generator. If the
voltage on this capacitor drops below V
DLR
, a reset signal is generated on pin 2 (Reset Output), i.e. reset output is set
low. If the output voltage rises above 4.5V, C
D
will be charged with constant current. After the power-on-reset time the
voltage on the capacitor reaches V
DU
and the reset output will be set high again. The value of the power-on-reset time
can be set within a wide range depending of the capacitance of C
D
.
The IC
•
•
•
•
also incorporate a number of internal circuits for protection against:
Overload
Over Voltage
Over temperature
Reverse Polarity
3/9
Version: A07
Preliminary
TS4270
5V Ultra Low Dropout Fixed Voltage Regulator
Reset Timing
The power-on reset delay time is defined by the charging time of an external capacitor C
D
which can be calculated as
follows:
C
D
= (Δt x I
D,C
) /
ΔV
C
D
= Delay capacitors
Definitions:
Δt
= Reset delay Time t
rd
I
D,C
= Charge current, typical 14uA
ΔV
= V
DU
, typical 1.8V
V
DU
= Upper reset timing threshold at C
D
for reset delay time
t
rd
=
ΔV
x C
D
/I
D,C
The reset reaction time t
rr
is the time it takes the voltage regulator to set the reset out LOW after the output voltage has
dropped below the reset threshold. It is typical 1uS for delay capacitor of 47nF. For other values for C
D
the reaction
time can be estimated using the following equation:
t
rr
≈
20s/F x C
D
Test Circuit
Application Circuit
4/9
Version: A07
Preliminary
TS4270
5V Ultra Low Dropout Fixed Voltage Regulator
Reset Time Response
Electrical Characteristics Curve
FIGURE 1 – Line Regulation
FIGURE 2 – Load Regulation
FIGURE 3 – Current Consumption vs. Input Voltage
FIGURE 4 – Dropout Voltage
5/9
Version: A07
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