TSM6866SD
20V Dual N-Channel MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
(mΩ)
20
30 @ V
GS
= 4.5V
40 @ V
GS
= 2.5V
TSSOP-8
Pin Definition:
1. Drain 1
8. Drain 2
2. Source 1
7. Source 2
3. Source 1
6. Source 2
4. Gate 1
5. Gate 2
I
D
(A)
6.0
5.2
Features
●
●
Advance Trench Process Technology
High Density Cell Design for Ultra Low On-resistance
Block Diagram
Application
●
●
Specially Designed for Li-on Battery Packs
Battery Switch Application
Ordering Information
Part No.
TSM6866SDCA RV
Package
TSSOP-8
Packing
3Kpcs / 13” Reel
Dual N-Channel MOSFET
Absolute Maximum Rating
(Ta = 25
o
C unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
Continuous Source Current (Diode Conduction)
Maximum Power Dissipation
Operating Junction Temperature
Operating Junction and Storage Temperature Range
a,b
o
o
Symbol
V
DS
V
GS
I
D
I
DM
I
S
P
D
T
J
T
J
, T
STG
Ta = 25 C
Ta = 75 C
Limit
20
±12
6
30
1.7
1.6
1.1
+150
-55 to +150
Unit
V
V
A
A
A
W
o
o
C
C
Thermal Performance
Parameter
Junction to Case Thermal Resistance
Junction to Ambient Thermal Resistance (PCB mounted)
Notes:
a. Pulse width limited by the Maximum junction temperature
b. Surface Mounted on FR4 Board, t
≤
5 sec.
Symbol
RӨ
JC
RӨ
JA
Limit
30
62.5
Unit
o
o
C/W
C/W
1/6
Version: A07
TSM6866SD
20V Dual N-Channel MOSFET
Electrical Specifications
(Ta = 25
o
C unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Diode Forward Voltage
Dynamic
b
Conditions
V
GS
= 0V, I
D
= 250uA
V
DS
= V
GS
, I
D
= 250uA
V
GS
= ±12V, V
DS
= 0V
V
DS
= 20V, V
GS
= 0V
V
DS
=5V, V
GS
= 4.5V
V
GS
= 4.5V, I
D
= 6.0A
V
GS
= 2.5V, I
D
= 5.2A
V
DS
= 10V, I
D
= 6A
I
S
= 1.7A, V
GS
= 0V
Symbol
BV
DSS
V
GS(TH)
I
GSS
I
DSS
I
D(ON)
R
DS(ON)
g
fs
V
SD
Q
g
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
Min
20
0.6
--
--
30
--
--
--
--
--
--
--
--
--
--
--
--
--
--
Typ
--
--
--
--
--
21
30
30
0.7
5
1
1.5
565
105
75
8
10
22
6
Max
--
--
±100
1.0
--
30
40
--
1.2
7
--
--
--
--
--
20
20
45
15
Unit
V
V
nA
uA
A
mΩ
S
V
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching
c
V
DS
= 10V, I
D
= 6A,
V
GS
= 4.5V
V
DS
= 8V, V
GS
= 0V,
f = 1.0MHz
nC
pF
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
V
DD
= 10V, R
L
= 10Ω,
I
D
= 1A, V
GEN
= 4.5V,
nS
R
G
= 6Ω
Turn-Off Fall Time
t
f
Notes:
a. pulse test: PW
≤300µS,
duty cycle
≤2%
b. For DESIGN AID ONLY, not subject to production testing.
b. Switching time is essentially independent of operating temperature.
2/6
Version: A07
TSM6866SD
20V Dual N-Channel MOSFET
Electrical Characteristics Curve
(Ta = 25
o
C, unless otherwise noted)
Output Characteristics
Transfer Characteristics
On-Resistance vs. Drain Current
Gate Charge
On-Resistance vs. Junction Temperature
Source-Drain Diode Forward Voltage
3/6
Version: A07
TSM6866SD
20V Dual N-Channel MOSFET
Electrical Characteristics Curve
(Ta = 25
o
C, unless otherwise noted)
On-Resistance vs. Gate-Source Voltage
Threshold Voltage
Single Pulse Power
Normalized Thermal Transient Impedance, Junction-to-Ambient
4/6
Version: A07
TSM6866SD
20V Dual N-Channel MOSFET
TSSOP-8 Mechanical Drawing
DIM
A
a
B
C
D
E
e
F
L
TSSOP-8 DIMENSION
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX
6.20
6.60
0.244
0.260
4.30
4.50
0.170
0.177
2.90
3.10
0.114
0.122
0.65 (typ)
0.025 (typ)
0.25
0.30
0.010
0.019
1.05
1.20
0.041
0.049
0.05
0.15
0.002
0.009
0.127
0.005
0.50
0.70
0.020
0.028
Marking Diagram
Y
= Year Code
M
= Month Code
(A=Jan,
B=Feb, C=Mar, D=Apl, E=May, F=Jun, G=Jul, H=Aug,
I=Sep, J=Oct, K=Nov, L=Dec)
L
= Lot Code
5/6
Version: A07
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