TSM4925D
30V Dual P-Channel MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
(mΩ)
-30
25 @ V
GS
= -10V
41 @ V
GS
= -4.5V
SOP-8
Pin Definition:
1. Source 1
8. Drain
2. Gate 1
7. Drain
3. Source 2
6. Drain
4. Gate 2
5. Drain
1
1
2
2
I
D
(A)
-7.1
-5.5
Features
●
●
Advance Trench Process Technology
High Density Cell Design for Ultra Low On-resistance
Block Diagram
Application
●
●
●
Load Switches
Notebook PCs
Desktop PCs
Ordering Information
Part No.
TSM4925DCS RL
Package
SOP-8
Packing
2.5Kpcs / 13” Reel
Dual P-Channel MOSFET
Absolute Maximum Rating
(Ta = 25
o
C unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
Continuous Source Current (Diode Conduction)
Maximum Power Dissipation
Operating Junction Temperature
Operating Junction and Storage Temperature Range
a,b
o
o
Symbol
V
DS
V
GS
I
D
I
DM
I
S
P
D
T
J
T
J
, T
STG
Ta = 25 C
Ta = 75 C
Limit
-30
±20
-7.1
-40
-1.7
2.0
1.3
+150
- 55 to +150
Unit
V
V
A
A
A
W
o
o
C
C
Thermal Performance
Parameter
Junction to Case Thermal Resistance
Junction to Ambient Thermal Resistance (PCB mounted)
Notes:
a. Pulse width limited by the Maximum junction temperature
b. Surface Mounted on FR4 Board, t
≤
10 sec.
Symbol
RӨ
JC
RӨ
JA
Limit
30
50
Unit
o
o
C/W
C/W
1/6
Version: A07
TSM4925D
30V Dual P-Channel MOSFET
Electrical Specifications
(Ta = 25
o
C unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
a
a
Conditions
V
GS
= 0V, I
D
= -250uA
V
DS
= V
GS
, I
D
= -250µA
V
GS
= ±20V, V
DS
= 0V
V
DS
= -30V, V
GS
= 0V
V
DS
= -5V, V
GS
= -10V
V
GS
= -10V, I
D
= -7.1A
V
GS
= -4.5V, I
D
= -5.5A
V
DS
= -10V, I
D
= -7.1A
I
S
= -1.7A, V
GS
= 0V
Symbol
BV
DSS
V
GS(TH)
I
GSS
I
DSS
I
D(ON)
R
DS(ON)
g
fs
V
SD
Q
g
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
Min
-30
-1
--
--
-40
--
--
--
--
--
--
--
--
--
--
--
--
--
--
Typ
--
--
--
--
--
20
33
24
-0.8
33
5.8
8.6
1573
319
211
10
15
110
70
Max
--
-3
±100
-1.0
--
25
41
--
-1.2
70
--
--
1900
--
295
15
25
170
110
Unit
V
V
nA
µA
A
mΩ
S
V
Drain-Source On-State Resistance
Forward Transconductance
Diode Forward Voltage
Dynamic
b
a
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching
c
V
DS
= -15V, I
D
= -7.1A,
V
GS
= -10V
V
DS
= -15V, V
GS
= 0V,
f = 1.0MHz
nC
pF
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
V
DD
= -15V, R
L
= 15Ω,
I
D
= -1A, V
GEN
= -10V,
nS
R
G
= 6Ω
Turn-Off Fall Time
t
f
Notes:
a. pulse test: PW
≤300µS,
duty cycle
≤2%
b. For DESIGN AID ONLY, not subject to production testing.
b. Switching time is essentially independent of operating temperature.
2/6
Version: A07
TSM4925D
30V Dual P-Channel MOSFET
Electrical Characteristics Curve
(Ta = 25
o
C, unless otherwise noted)
Output Characteristics
Transfer Characteristics
On-Resistance vs. Drain Current
Gate Charge
On-Resistance vs. Junction Temperature
Source-Drain Diode Forward Voltage
3/6
Version: A07
TSM4925D
30V Dual P-Channel MOSFET
Electrical Characteristics Curve
(Ta = 25
o
C, unless otherwise noted)
On-Resistance vs. Gate-Source Voltage
Threshold Voltage
Single Pulse Power
Normalized Thermal Transient Impedance, Junction-to-Ambient
4/6
Version: A07
TSM4925D
30V Dual P-Channel MOSFET
SOP-8 Mechanical Drawing
DIM
A
B
C
D
F
G
K
M
P
R
SOP-8 DIMENSION
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX.
4.80
5.00
0.189
0.196
3.80
4.00
0.150
0.157
1.35
1.75
0.054
0.068
0.35
0.49
0.014
0.019
0.40
1.25
0.016
0.049
1.27BSC
0.05BSC
0.10
0.25
0.004
0.009
0º
7º
0º
7º
5.80
6.20
0.229
0.244
0.25
0.50
0.010
0.019
Marking Diagram
Y
= Year Code
M
= Month Code
(A=Jan,
B=Feb, C=Mar, D=Apl, E=May, F=Jun, G=Jul, H=Aug,
I=Sep, J=Oct, K=Nov, L=Dec)
L
= Lot Code
5/6
Version: A07
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