TSM3481
30V P-Channel MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
(mΩ)
-30
48 @ V
GS
= -10V
79 @ V
GS
= -4.5V
SOT-26
Pin Definition:
1. Drain 6. Drain
2. Drain 5, Drain
3. Gate 4. Source
I
D
(A)
-5.3
-4.1
Features
●
●
Advance Trench Process Technology
High Density Cell Design for Ultra Low On-resistance
Block Diagram
Application
●
●
DC-DC Conversion
Asynchronous Buck Converter
Ordering Information
Part No.
TSM3481CX6 RF
Package
SOP-8
Packing
3Kpcs / 7” Reel
P-Channel MOSFET
Absolute Maximum Rating
(Ta = 25
o
C unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
Continuous Source Current (Diode Conduction)
Maximum Power Dissipation
Operating Junction Temperature
Operating Junction and Storage Temperature Range
a,b
o
o
Symbol
V
DS
V
GS
I
D
I
DM
I
S
P
D
T
J
T
J
, T
STG
Ta = 25 C
Ta = 75 C
Limit
-30
±20
-5.3
-20
-1.7
2.0
1.3
+150
- 55 to +150
Unit
V
V
A
A
A
W
o
o
C
C
Thermal Performance
Parameter
Junction to Case Thermal Resistance
Junction to Ambient Thermal Resistance (PCB mounted)
Notes:
a. Pulse width limited by the Maximum junction temperature
b. Surface Mounted on FR4 Board, t
≤
10 sec.
Symbol
RӨ
JC
RӨ
JA
Limit
30
80
Unit
o
o
C/W
C/W
1/6
Version: A07
TSM3481
30V P-Channel MOSFET
Electrical Specifications
(Ta = 25
o
C unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
a
a
Conditions
V
GS
= 0V, I
D
= -250uA
V
DS
= V
GS
, I
D
= -250µA
V
GS
= ±20V, V
DS
= 0V
V
DS
= -24V, V
GS
= 0V
V
DS
≤
-5V, V
GS
= -4.5V
V
GS
= -10V, I
D
= -5.3A
V
GS
= -4.5V, I
D
= -4.1A
V
DS
= -15V, I
D
= -5.3A
I
S
= -1.7A, V
GS
= 0V
Symbol
BV
DSS
V
GS(TH)
I
GSS
I
DSS
I
D(ON)
R
DS(ON)
g
fs
V
SD
Q
g
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
Min
-30
-1
--
--
-20
--
--
--
--
--
--
--
--
--
--
--
--
--
--
Typ
--
--
--
--
--
38
63
12
-0.85
18.09
6.52
3.25
1047.98
172.82
115.50
20.52
4.43
42.81
7.35
Max
--
-3
±100
1.0
--
48
79
--
-1.2
--
--
--
--
--
--
--
--
--
--
Unit
V
V
nA
µA
A
mΩ
S
V
Drain-Source On-State Resistance
Forward Transconductance
Diode Forward Voltage
Dynamic
b
a
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching
c
V
DS
= -15V, I
D
= -5.3A,
V
GS
= -10V
V
DS
= -15V, V
GS
= 0V,
f = 1.0MHz
nC
pF
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
V
DD
= -15V, R
L
= 15Ω,
I
D
= -1A, V
GEN
= -10V,
R
G
= 6Ω
nS
Turn-Off Fall Time
t
f
Notes:
a. pulse test: PW
≤300µS,
duty cycle
≤2%
b. For DESIGN AID ONLY, not subject to production testing.
b. Switching time is essentially independent of operating temperature.
2/6
Version: A07
TSM3481
30V P-Channel MOSFET
Electrical Characteristics Curve
(Ta = 25
o
C, unless otherwise noted)
Output Characteristics
Transfer Characteristics
On-Resistance vs. Drain Current
Gate Charge
On-Resistance vs. Junction Temperature
Source-Drain Diode Forward Voltage
3/6
Version: A07
TSM3481
30V P-Channel MOSFET
Electrical Characteristics Curve
(Ta = 25
o
C, unless otherwise noted)
On-Resistance vs. Gate-Source Voltage
Threshold Voltage
Single Pulse Power
Normalized Thermal Transient Impedance, Junction-to-Ambient
4/6
Version: A07
TSM3481
30V P-Channel MOSFET
SOT-26 Mechanical Drawing
DIM
A
A1
B
C
D
E
F
G
H
I
J
SOT-26 DIMENSION
MILLIMETERS
INCHES
MIN
MIN
TYP
MAX
TYP
0.95 BSC
1.9 BSC
2.60
1.40
2.80
1.00
0.00
0.35
0.10
0.30
5º
2.80
1.50
2.90
1.10
--
0.40
0.15
--
--
3.00
1.70
3.10
1.20
0.10
0.50
0.20
0.60
10º
0.0374 BSC
MAX
0.0748 BSC
0.1024 0.1102 0.1181
0.0551
0.1101
0.0394
0.00
0.0138
0.0039
0.0118
5º
0.0157
0.0059
--
--
0.0591
0.1142
0.0433
0.0669
0.1220
0.0472
0.0039
0.0197
0.0079
0.0236
10º
Marking Diagram
81
= Device Code
Y
= Year Code
M
= Month Code
(A=Jan,
B=Feb, C=Mar, D=Apl, E=May, F=Jun, G=Jul, H=Aug,
I=Sep, J=Oct, K=Nov, L=Dec)
L
= Lot Code
5/6
Version: A07
FPGA/CPLD
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