19-2935; Rev 0; 7/03
10Gbps EAM Driver with Integrated
Bias Network
General Description
The MAX3941 is designed to drive an electro-absorp-
tion modulator (EAM) at data rates up to 10.7Gbps. It
incorporates the functions of a biasing circuit and a
modulation circuit, with integrated control op amps
externally programmed by DC voltages.
The integrated bias circuit provides a programmable
biasing current up to 50mA. This bias current reflects a
bias voltage of up to 1.25V on an external 50Ω load. The
bias and modulation circuits are internally connected on
chip, eliminating the need for an external bias inductor.
A high-bandwidth, fully differential signal path is internally
implemented to minimize jitter accumulation. When a
clock signal is available, the integrated data-retiming
function can be selected to reject input-signal jitter.
The MAX3941 receives differential CML signals (ground
referenced) with on-chip line terminations of 50Ω. The
output has a 50Ω resistor for back termination and is
able to deliver a modulation current of 40mA
P-P
to
120mA
P-P
, with an edge speed of 23ps (20% to 80%
typ). This modulation current reflects an EAM modula-
tion voltage of 1.0V
P-P
to 3.0V
P-P
.
The MAX3941 also includes an adjustable pulse-width
control circuit to precompensate for asymmetrical EAM
characteristics. It is available in a compact 4mm x
4mm, 24-pin thin QFN package and operates over the
-40°C to +85°C temperature range.
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Features
On-Chip Bias Network
23ps Edge Speed
Programmable Modulation Voltage Up to 3V
P-P
Programmable EAM Biasing Voltage Up to 1.25V
Selectable Data-Retiming Latch
Up to 10.7Gbps Operation
Integrated Modulation and Biasing Functions
50Ω On-Chip Input and Output Terminations
Pulse-Width Adjustment
Enable and Polarity Controls
ESD Protection
MAX3941
Ordering Information
PART
MAX3941ETG
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
24-Thin QFN
(4mm x 4mm)
Applications
SONET OC-192 and SDH STM-64
Transmission Systems
DWDM Systems
Long/Short-Reach Optical Transmitters
10Gbps Ethernet
Typical Application Circuit
-5.2V
0.01µF
DATA+
0.01µF
50Ω
DATA+
PLRT MODEN
RTEN
GND
EAM
MAX3952
10Gbps
SERIALIZER
DATA-
50Ω
DATA-
0.01µF
CLK+
0.01µF
CLK-
50Ω
CLK-
PWC+
2kΩ
PWC-
50Ω
CLK+
MAX3941
OUT
50Ω
MODSET
+
V
MODSET
-
BIASSET
+
V
BIASSET
-
V
EE
-5.2V
330pF
-5.2V
0.1µF
REPRESENTS A CONTROLLED-
-5.2V
IMPEDANCE TRANSMISSION LINE.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
10Gbps EAM Driver with Integrated
Bias Network
MAX3941
ABSOLUTE MAXIMUM RATINGS
Supply Voltage V
EE
..............................................-6.0V to +0.5V
Voltage at
MODEN,
RTEN,
PLRT, MODSET, BIASSET ...........(V
EE
- 0.5V) to +0.5V
Voltage at DATA+, DATA-, CLK+, and CLK-……-1.65V to +0.5V
Voltage at OUT .............................................……….-4V to +0.5V
Voltage at PWC+, PWC- ...................(V
EE
- 0.5V) to (V
EE
+ 1.7V)
Current Into or Out of OUT.............................……………...80mA
Continuous Power Dissipation (T
A
= +85°C)
24-Lead Thin QFN
(derate 20.8mW/°C above +85°C) .............................1354mW
Storage Temperature Range .....................……-55°C to +150°C
Operating Temperature Range ....................……-40°C to +85°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
EE
= -5.5V to -4.9V, T
A
= -40°C to +85°C. Typical values are at V
EE
= -5.2V, I
BIAS
= 30mA, I
MOD
= 100mA, and T
A
= +25°C, unless
otherwise noted.)
PARAMETER
Power-Supply Voltage
Supply Current
Power-Supply Noise Rejection
SIGNAL INPUT
(Note 3)
Input Data Rates
Single-Ended Input Resistance
Single-Ended Input Voltage
Differential Input Voltage
Differential Input Return Loss
EAM BIAS
Maximum Bias Current
Minimum Bias Current
BIASSET Voltage Range
Equivalent Bias Resistance
Bias-Current-Setting Accuracy
Bias-Current Temperature
Stability
BIASSET Input Resistance
BIASSET Bandwidth
EAM MODULATION
Maximum Modulation Current
Minimum Modulation Current
MODSET Voltage Range
Equivalent Modulation Resistance
V
MODSET
R
MODEQV
(Note 7)
V
MODSET
= V
EE
V
EE
11.1
112
120
37
40
V
EE
+ 1
mA
P-P
mA
P-P
V
Ω
50Ω driver load, V
BIASSET
= V
EE
+ 0.55V,
Figure 2
V
BIASSET
R
BSEQV
(Note 5)
V
BIASSET
= V
EE
+ 0.11V
T
A
= +25°C
V
BIASSET
= V
EE
+ 0.36V
V
BIASSET
= V
EE
+ 2.0V
(Note 6)
V
BIASSET
< V
EE
+ 0.36V
V
BIASSET
≥
V
EE
+ 0.36V
2.1
8.8
52
-1100
-480
20
5
V
BIASSET
= V
EE
+ 2V
V
BIASSET
= V
EE
V
EE
36.4
4.3
11.3
58.4
+1100
+480
ppm/°C
kΩ
MHz
mA
50
56
0.3
1.2
V
EE
+ 2
mA
mA
V
Ω
R
IN
V
IS
V
ID
RL
IN
NRZ
Input to GND
DC-coupled, Figure 1a
AC-coupled, Figure 1b
DC-coupled (Note 4)
AC-coupled (Note 4)
≤15GHz
42.5
-1
-0.4
0.2
0.2
15
10.7
50
58.5
0
+0.4
2.0
1.6
Gbps
Ω
V
V
P-P
dB
SYMBOL
V
EE
I
EE
PSNR
Excluding I
BIAS
and
I
MOD
(Note 1)
f
≤
2MHz (Note 2)
Retime disabled
Retime enabled
CONDITIONS
MIN
-5.5
124
140
15
TYP
MAX
-4.9
174
201
UNITS
V
mA
dB
2
_______________________________________________________________________________________
10Gbps EAM Driver with Integrated
Bias Network
ELECTRICAL CHARACTERISTICS (continued)
(V
EE
= -5.5V to -4.9V, T
A
= -40°C to +85°C. Typical values are at V
EE
= -5.2V, I
BIAS
= 30mA, I
MOD
= 100mA, and T
A
= +25°C, unless
otherwise noted.)
PARAMETER
Modulation Set Bandwidth
MODSET Input Resistance
Modulation-Current Temperature
Stability
Modulation-Current-Setting Error
Output Resistance
Total Off Current
Output Return Loss
Output Edge Speed
Setup/Hold Time
Pulse-Width Adjustment Range
Pulse-Width Control Input Range
(Single Ended)
Pulse-Width Control Input Range
(Differential)
Output Overshoot
Driver Random Jitter
Driver Deterministic Jitter
CONTROL INPUTS
Input High Voltage
Input Low Voltage
Input Current
V
IH
V
IL
(Note 10)
(Note 10)
(Note 10)
-80
V
EE
+
2.0
V
EE
+
0.8
+200
V
V
µA
δ
RJ
DR
DJ
DR
t
SU
, t
HD
RL
OUT
R
OUT
(Note 6)
50Ω driver load, T
A
= +25°C
OUT to GND
BIASSET = V
EE
,
MODEN
= V
EE
, MODSET =
V
EE
, DATA+ = high, DATA- = low
I
BIAS
= 30mA,
I
MOD
= 50mA
Figure 3 (Note 6)
(Notes 6, 8)
For PWC+ and PWC-
(PWC+) - (PWC-)
(Notes 6, 8)
(Note 6)
PWC- = GND (Notes 6, 9)
≤15GHz
10
23
25
±30
V
EE
+
0.5
-0.5
10
0.3
6.8
0.7
11
±50
V
EE
+
1.5
+0.5
32
-957
-10
42.5
50
SYMBOL
CONDITIONS
Modulation depth 10%, 50Ω driver load,
Figure 2
MIN
TYP
5
20
0
+10
58.5
1.2
MAX
UNITS
MHz
kΩ
ppm/°C
%
Ω
mA
dB
ps
ps
ps
V
V
%
ps
RMS
ps
P-P
MAX3941
20% to 80% (Notes 6, 8)
Note 1:
Supply current remains elevated once the retiming function is enabled. Power must be cycled to reduce supply
current after the retiming function is disabled.
Note 2:
Power-supply noise rejection is specified as PSNR = 20log(V
noise (on Vcc)
/
∆V
OUT
). V
OUT
is the voltage across a 50Ω load.
V
noise (on Vcc)
= 100mV
P-P
.
Note 3:
For DATA+, DATA-, CLK+, and CLK-.
Note 4:
CLK input characterized at 10.7Gbps.
Note 5:
R
BSEQV
= (V
BIASSET
- V
EE
) / I
BIAS
with
MODEN
= V
EE
, DATA+ = high, and DATA- = low.
Note 6:
Guaranteed by design and characterization using the circuit shown in Figure 4.
Note 7:
R
MODEQV
= (V
MODSET
- V
EE
) / (I
MOD
- 37mA) with BIASSET = V
EE
.
Note 8:
50Ω load, characterized at 10.7Gbps with a 1111 1111 0000 0000 pattern.
Note 9:
Deterministic jitter is defined as the arithmetic sum of pulse-width distortion (PWD) and pattern-dependent jitter (PDJ).
Measured with a 10.7Gbps 2
7
- 1 PRBS pattern with eighty 0s and eighty 1s inserted in the data pattern.
Note 10:
For
MODEN
and PLRT.
_______________________________________________________________________________________
3
10Gbps EAM Driver with Integrated
Bias Network
MAX3941
Test Circuits and Timing Diagrams
0V
100mV
1.0V
-0.5V
-1.0V
(a) DC-COUPLED SINGLE-ENDED CML INPUT
0.4V
800mV
0V
100mV
-0.4V
(b) AC-COUPLED SINGLE-ENDED (CML OR PECL) INPUT
Figure 1. Definition of Single-Ended Input Voltage Range
0V
0V
V
OUT
V
OUT
V
BIASSET
(a) MODULATING BIASSET
0V
(c) RESULT OF MODULATING BIASSET
AND MODSET 180° OUT OF PHASE
V
OUT
mW
P
OUT
V
MODSET
(b) MODULATING MODSET
NOTE:
ALL AMPLITUDES ARE RELATIVE.
(d) RESULTING OPTICAL OUTPUT
Figure 2. Modulating BIASSET and MODSET Pins
4
_______________________________________________________________________________________
10Gbps EAM Driver with Integrated
Bias Network
Test Circuits and Timing Diagrams (continued)
CLK+
CLK-
DATA-
DATA+
V
IS
= 0.1V
P-P
TO 1V
P-P
DC-COUPLED
0.1V
P-P
TO 0.8V
P-P
AC-COUPLED
V
IS
MAX3941
t
SU
t
HD
(DATA+) -
(DATA-)
V
ID
= 0.2V
P-P
TO 2V
P-P
DC-COUPLED
0.2V
P-P
TO 1.6V
P-P
AC-COUPLED
I
OUT
I
MOD
= 40mA
P-P
TO 120mA
P-P
I
BIAS
= 0mA TO 50mA
NOTE:
I
OUT
RELATES TO RETIMED DATA.
Figure 3. Setup and Hold Timing Definition
GND
RTEN PWC+
PWC-
50Ω
GND
50Ω
GND1
GND2
R
OUT
50Ω
OUT
I
OUT
OSCILLOSCOPE
50Ω
50Ω
Z
L
50Ω
50Ω
50Ω
PATTERN
GENERATOR
50Ω
50Ω
DATA+
CLK+
CLK-
50Ω
P
W
C
D Q
0
M
U
X
I
MOD
I
BIAS
1
DATA-
50Ω
50Ω
V
EE
V
EE
V
EE
-5.2V
0.1µF
300pF
MODSET
V
MODSET
V
EE
BIASSET
V
BIASSET
V
EE
Figure 4. AC-Characterization Circuit
_______________________________________________________________________________________
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