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74ALVC16245 Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs
October 2001
Revised May 2005
74ALVC16245
Low Voltage 16-Bit Bidirectional Transceiver
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC16245 contains sixteen non-inverting bidirec-
tional buffers with 3-STATE outputs and is intended for bus
oriented applications. The device is byte controlled. Each
byte has separate 3-STATE control inputs which can be
shorted together for full 16-bit operation. The T/R inputs
determine the direction of data flow through the device.
The OE inputs disable both the A and B ports by placing
them in a high impedance state.
The 74ALVC16245 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The 74ALVC16245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
1.65V–3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
t
PD
3.0 ns max for 3.0V to 3.6V V
CC
3.5 ns max for 2.3V to 2.7V V
CC
6.0 ns max for 1.65V to 1.95V V
CC
s
Power-down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
Uses patented noise/EMI reduction circuitry
s
Latchup conforms to JEDEC JED78
s
ESD performance:
Human body model
!
2000V
Machine model
!
200V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number
74ALVC16245G
(Note 2)(Note 3)
74ALVC16245MTD
(Note 3)
Package Number
BGA54A
MTD48
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 2:
Ordering code “G” indicates Trays.
Note 3:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
© 2005 Fairchild Semiconductor Corporation
DS500678
www.fairchildsemi.com
74ALVC16245
Connection Diagrams
Pin Assignment of TSSOP
Pin Descriptions
Pin Names
OE
n
T/R
n
A
0
–A
15
B
0
–B
15
NC
Description
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
No Connect
FBGA Pin Assignments
1
A
B
C
D
E
F
G
H
J
B
0
B
2
B
4
B
6
B
8
B
10
B
12
B
14
B
15
2
NC
B
1
B
3
B
5
B
7
B
9
B
11
B
13
NC
3
T/R
1
NC
V
CC
GND
GND
GND
V
CC
NC
T/R
2
4
OE
1
NC
V
CC
GND
GND
GND
V
CC
NC
OE
2
5
NC
A
1
A
3
A
5
A
7
A
9
A
11
A
13
NC
6
A
0
A
2
A
4
A
6
A
8
A
10
A
12
A
14
A
15
Truth Tables
Pin Assignment for FBGA
OE
1
L
L
H
Inputs
OE
2
L
L
H
(Top Thru View)
T/R
2
L
H
X
Outputs
Bus B
8
–B
15
Data to Bus A
8
–A
15
Bus A
8
–A
15
Data to Bus B
8
–B
15
HIGH Z State on A
8
–A
15
, B
8
–B
15
Inputs
T/R
1
L
H
X
Outputs
Bus B
0
–B
7
Data to Bus A
0
–A
7
Bus A
0
–A
7
Data to Bus B
0
–B
7
HIGH Z State on A
0
–A
7
, B
0
–B
7
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial (HIGH or LOW, inputs and I/O’s may not float)
Z High Impedance
Logic Diagram
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2
74ALVC16245
Absolute Maximum Ratings
(Note 4)
Supply Voltage (V
CC
)
DC Input Voltage (V
I
)
Output Voltage (V
O
) (Note 5)
DC Input Diode Current (I
IK
)
V
I
0V
DC Output Diode Current (I
OK
)
V
O
0V
DC Output Source/Sink Current
(I
OH
/I
OL
)
DC V
CC
or GND Current per
Supply Pin (I
CC
or GND)
Storage Temperature Range (T
STG
)
0.5V to
4.6V
0.5V to 4.6V
0.5V to V
CC
0.5V
50 mA
50 mA
r
50 mA
r
100 mA
65
q
C to
150
q
C
Recommended Operating
Conditions
(Note 6)
Power Supply
Operating
Input Voltage
Output Voltage (V
O
)
Free Air Operating Temperature (T
A
)
Minimum Input Edge Rate (
'
t/
'
V)
V
IN
0.8V to 2.0V, V
CC
3.0V
10 ns/V
Note 4:
The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat-
ings. The “Recommended Operating Conditions” table will define the condi-
tions for actual device operation.
Note 5:
I
O
Absolute Maximum Rating must be observed.
Note 6:
Floating or unused control inputs must be held HIGH or LOW.
1.65V to 3.6V
0V to V
CC
0V to V
CC
40
q
C to
85
q
C
DC Electrical Characteristics
Symbol
V
IH
Parameter
HIGH Level Input Voltage
Conditions
V
CC
(V)
1.65 - 1.95
2.3 - 2.7
2.7 - 3.6
V
IL
LOW Level Input Voltage
1.65 - 1.95
2.3 - 2.7
2.7 - 3.6
V
OH
HIGH Level Output Voltage
I
OH
I
OH
I
OH
I
OH
Min
0.65 x V
CC
1.7
2.0
0.35 x V
CC
0.7
0.8
V
CC
- 0.2
1.2
2.0
1.7
2.2
2.4
2
0.2
0.45
0.4
0.7
0.4
0.55
V
V
V
V
Max
Units
100
P
A
4 mA
6 mA
12 mA
1.65 - 3.6
1.65
2.3
2.3
2.7
3.0
I
OH
V
OL
LOW Level Output Voltage
I
OL
I
OL
I
OL
I
OL
I
OL
I
I
I
OZ
I
CC
Input Leakage Current
3-STATE Output Leakage
Quiescent Supply Current
Increase in I
CC
per Input
24 mA
100
P
A
4 mA
6 mA
12 mA
24 mA
3.0
1.65 - 3.6
1.65
2.3
2.3
2.7
3.0
3.6
3.6
0
3.6
3 - 3.6
0
d
V
I
d
3.6V
0
d
V
O
d
3.6V
V
I
V
IH
V
CC
or GND, I
O
V
CC
0.6V
r
5.0
r
10
40
750
P
A
P
A
P
A
P
A
'
I
CC
3
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74ALVC16245
AC Electrical Characteristics
T
A
Symbol
Parameter
V
CC
Min
t
PHL
, t
PLH
t
PZL
, t
PZH
t
PLZ
, t
PHZ
Propagation Delay
Output Enable Time
Output Disable Time
1.3
1.3
1.3
C
L
3.3V
r
0.3V
Max
3
4.3
4.2
50 pF
V
CC
Min
1.5
1.5
1.5
2.7V
Max
3.5
5.4
4.7
V
CC
Min
1.0
1.0
1.0
40
q
C to
85
q
C, R
L
500
:
C
L
2.5V
r
0.2V
Max
3.0
4.9
4.2
30 pF
V
CC
Min
1.5
1.5
1.5
1.8V
r
0.15V
Max
6.0
9.3
7.6
ns
ns
ns
Units
Capacitance
Symbol
C
IN
C
IO
C
PD
Input Capacitance
Input, Output Capacitance
Power Dissipation Capacitance
Parameter
V
I
V
O
Outputs Enabled f
Conditions
0V or V
CC
0V or V
CC
10 MHz, C
L
50 pF
T
A
V
CC
3.3
3.3
3.3
2.5
25
q
C
Typical
6
7
20
20
Units
pF
pF
pF
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4