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74ACTQ10 Quiet Series™ Triple 3-Input NAND Gate
May 2007
74ACTQ10
Quiet Series™ Triple 3-Input NAND Gate
Features
■
I
CC
reduced by 50%
■
Guaranteed simultaneous switching noise level and
tm
General Description
The ACTQ10 contains three, 3-input NAND gates and
utilizes Fairchild FACT Quiet Series™ technology to
guarantee quiet output switching and improved dynamic
threshold performance. FACT Quiet Series features
GTO™ output control and undershoot corrector in
addition to a split ground bus for superior ACMOS
performance.
dynamic threshold performance
■
Improved latch-up immunity
■
Outputs source/sink 24mA
■
ACTQ10 has TTL-compatible inputs
Ordering Information
Order Number
74ACTQ10SC
74ACTQ10MTC
Package
Number
M14A
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Body
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
A
n
, B
n
, C
n
O
n
Inputs
Outputs
Descriptions
FACT™, FACT Quiet Series™, and GTO™ are trademarks of Fairchild Semiconductor Corporation.
©1990 Fairchild Semiconductor Corporation
74ACTQ10 Rev. 1.5
www.fairchildsemi.com
74ACTQ10 Quiet Series™ Triple 3-Input NAND Gate
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
I
IK
Supply Voltage
DC Input Diode Current
V
I
=
–0.5V
V
I
=
V
CC
+ 0.5V
V
I
I
OK
DC Input Voltage
DC Output Diode Current
V
O
=
–0.5V
V
O
=
V
CC
+ 0.5V
V
O
I
O
DC Output Voltage
Parameter
Rating
–0.5V to +7.0V
–20mA
+20mA
–0.5V to V
CC
+ 0.5V
–20mA
+20mA
–0.5V to V
CC
+ 0.5V
±50mA
±50mA
–65°C to +150°C
±300mA
140°C
DC Output Source or Sink Current
I
CC
or I
GND
DC V
CC
or Ground Current per Output Pin
T
STG
Storage Temperature
DC Latch-Up Source or Sink Current
T
J
Junction Temperature
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
I
V
O
T
A
∆
V /
∆
t
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Minimum Input Edge Rate:
Parameter
Rating
4.5V to 5.5V
0V to V
CC
0V to V
CC
–40°C to +85°C
125mV/ns
V
IN
from 0.8V to 2.0V, V
CC
@ 4.5V, 5.5V
©1990 Fairchild Semiconductor Corporation
74ACTQ10 Rev. 1.5
www.fairchildsemi.com
2
74ACTQ10 Quiet Series™ Triple 3-Input NAND Gate
DC Electrical Characteristics
T
A
=
+25°C
Symbol
V
IH
V
IL
V
OH
T
A
=
–40°C to +85°C
Units
V
V
V
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
±1.0
1.5
75
–75
µA
mA
mA
mA
µA
V
V
V
V
V
Parameter
Minimum HIGH Level
Input Voltage
Maximum LOW Level
Input Voltage
Minimum HIGH Level
Output Voltage
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
Conditions
V
OUT
=
0.1V
or V
CC
– 0.1V
V
OUT
=
0.1V
or V
CC
– 0.1V
I
OUT
=
–50µA
V
IN
=
V
IL
or V
IH
:
Typ.
1.5
1.5
1.5
1.5
4.49
5.49
2.0
2.0
0.8
0.8
4.4
5.4
Guaranteed Limits
4.5
5.5
V
OL
Maximum LOW Level
Output Voltage
4.5
5.5
I
OH
=
–24mA
I
OH
=
–24mA
(1)
I
OUT
=
50µA
V
IN
=
V
IL
or V
IH
:
0.001
0.001
I
OL
=
24mA
I
OL
=
24mA
(1)
V
I
=
V
CC
, GND
V
I
=
V
CC
– 2.1V
V
OLD
=
1.65V Max.
V
OHD
=
3.85V Min.
V
IN
=
V
CC
or GND
Figures 1 & 2
(3)
Figures 1 & 2
(3)
(4)
3.86
4.86
0.1
0.1
0.36
0.36
±0.1
0.6
4.5
5.5
I
IN
I
CCT
I
OLD
I
OHD
I
CC
V
OLP
V
OLV
V
IHD
V
ILD
Maximum Input
Leakage Current
Maximum I
CC
/Input
Minimum Dynamic
Output Current
(2)
Maximum Quiescent
Supply Current
Quiet Output Maximum
Dynamic V
OL
Quiet Output Minimum
Dynamic V
OL
Minimum HIGH Level
Dynamic Input Voltage
Maximum LOW Level
Dynamic Input Voltage
5.5
5.5
5.5
5.5
5.5
5.0
5.0
5.0
5.0
2.0
1.1
–0.6
1.9
1.2
1.5
–1.2
2.2
0.8
20.0
(4)
Notes:
1. All outputs loaded; thresholds on input associated with output under test.
2. Maximum test duration 2.0ms, one output loaded at a time.
3. Max number of outputs defined as (n). Data inputs are 0V to 3V. One output @ GND.
4. Max number of data inputs (n) switching. (n-1) inputs switching 0V to 3V. Input-under-test switching:
3V to threshold (V
ILD
), 0V to threshold (V
IHD
), f
=
1MHz.
©1990 Fairchild Semiconductor Corporation
74ACTQ10 Rev. 1.5
www.fairchildsemi.com
3
74ACTQ10 Quiet Series™ Triple 3-Input NAND Gate
AC Electrical Characteristics
T
A
=
+25°C,
C
L
=
50 pF
Symbol
t
PLH
t
PHL
T
A
=
–40°C to +85°C,
C
L
=
50pF
Min.
2.0
2.0
Parameter
Propagation Delay
Propagation Delay
V
CC
(V)
(5)
5.0
5.0
5.0
Min.
2.0
2.0
Typ.
6.0
6.0
0.5
Max.
7.5
7.5
1.0
Max.
8.5
8.5
1.0
Units
ns
ns
ns
t
OSHL
, t
OSLH
Output to Output Skew
(6)
Notes:
5. Voltage range 5.0 is 5.0V ± 0.5V.
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two
separate outputs of the same device. The specification applies to any outputs switching in the same direction,
either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
). Parameter guaranteed by design.
Capacitance
Symbol
C
IN
C
PD
Parameter
Input Capacitance
Power Dissipation Capacitance
Conditions
V
CC
=
OPEN
V
CC
=
5.0V
Typ.
4.5
85
Units
pF
pF
©1990 Fairchild Semiconductor Corporation
74ACTQ10 Rev. 1.5
www.fairchildsemi.com
4
stm32/stm8
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