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74LVX174 Low Voltage Hex D-Type Flip-Flop with Master Reset
May 1993
Revised October 2003
74LVX174
Low Voltage Hex D-Type Flip-Flop with Master Reset
General Description
The LVX174 is a high-speed hex D flip-flop. The device is
used primarily as a 6-bit edge-triggered storage register.
The information on the D inputs is transferred to storage
during the LOW-to-HIGH clock transition. The device has a
Master Reset to simultaneously clear all flip-flops.
Features
s
Input voltage level translation from 5V to 3V
s
Ideal for low power/low noise 3.3V applications
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Order Number
74LVX174M
74LVX174SJ
74LVX174MTC
Package Number
M16A
M16D
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
D
0
–D
5
CP
MR
Q
0
–Q
5
Description
Data Inputs
Clock Pulse Input
Master Reset Input
Outputs
© 2003 Fairchild Semiconductor Corporation
DS011607
www.fairchildsemi.com
74LVX174
Truth Table
Inputs
Operating Mode
MR
Reset (Clear)
Load ‘1’
Load ‘0’
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
=
LOW-to-HIGH Transition
Outputs
D
n
X
H
L
Q
n
L
H
L
CP
L
H
H
X
Logic Diagram
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2
74LVX174
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
= −
0.5V
DC Input Voltage (V
I
)
DC Output Diode Current (I
OK
)
V
O
= −
0.5V
V
O
=
V
CC
+
0.5V
DC Output Voltage (V
O
)
DC Output Source
or Sink Current (I
O
)
DC V
CC
or Ground Current
(I
CC
or I
GND
)
Storage Temperature (T
STG
)
Power Dissipation (P
D
)
−
0.5V to
+
7.0V
−
20 mA
−
0.5V to 7V
−
20 mA
+
20 mA
−
0.5V to V
CC
+
0.5V
±
25 mA
±
50 mA
−
65
°
C to
+
150
°
C
180 mW
Recommended Operating
Conditions
(Note 2)
Supply Voltage (V
CC
)
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
Input Rise and Fall Time (
∆
t/
∆
V)
2.0V to 3.6V
0V to 5.5V
0V to V
CC
−
40
°
C to
+
85
°
C
0 ns/V to 100 ns/V
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2:
Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
V
IH
Parameter
HIGH Level
Input Voltage
V
IL
LOW Level
Input Voltage
V
OH
HIGH Level
Output Voltage
V
OL
LOW Level
Output Voltage
I
IN
I
CC
Input Leakage Current
Quiescent Supply Current
V
CC
2.0
3.0
3.6
2.0
3.0
3.6
2.0
3.0
3.0
2.0
3.0
3.0
3.6
3.6
1.9
2.9
2.58
0.0
0.0
0.1
0.1
0.36
±0.1
4.0
2.0
3.0
T
A
= +25°C
Min
1.5
2.0
2.4
0.5
0.8
0.8
1.9
2.9
2.48
0.1
0.1
0.44
±1.0
40.0
µA
µA
V
V
IN
=
V
IL
or V
IH
V
Typ
Max
T
A
= −40°C
to
+85°C
Min
1.5
2.0
2.4
0.5
0.8
0.8
V
IN
=
V
IL
or V
IH
I
OH
= −50 µA
I
OH
= −50 µA
I
OH
= −4
mA
I
OL
=
50
µA
I
OL
=
50
µA
I
OL
=
4 mA
V
IN
=
5.5V or GND
V
IN
=
V
CC
or GND
V
V
Max
Units
Conditions
Noise Characteristics
(Note 3)
Symbol
V
OLP
V
OLV
V
IHD
V
ILD
Parameter
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
V
CC
(V)
3.3
3.3
3.3
3.3
T
A
=
25°C
Typ
0.3
−0.3
Limit
0.5
−0.5
2.0
0.8
Units
V
V
V
V
C
L
(pF)
50
50
50
50
Note 3:
(Input t
r
=
t
f
=
3 ns)
3
www.fairchildsemi.com
74LVX174
AC Electrical Characteristics
Symbol
t
PLH
t
PHL
Parameter
Propagation
Delay Time
CP to Q
n
t
PHL
Propagation Delay
MR to Q
n
3.3
±
0.3
t
S
t
H
t
REC
t
W
Setup Time
D
n
to CP
Hold Time
D
n
to CP
Removal Time
MR to CP
Clock Pulse
Width
t
W
f
MAX
MR Pulse
Width
Maximum Clock
Frequency
3.3
±
0.3
t
OSLH
t
OSHL
Output to Output
Skew (Note 4)
2.7
3.3
2.7
3.3
±
0.3
2.7
3.3
±
0.3
2.7
3.3
±
0.3
2.7
3.3
±
0.3
2.7
3.3
±
0.3
2.7
7.5
5.0
0
0
4.5
3.0
6.5
5.0
6.5
5.0
65
45
115
65
130
60
180
95
1.5
1.5
3.3
±
0.3
2.7
V
CC
(V)
2.7
Min
T
A
= +25°C
Typ
7.6
10.1
5.9
8.4
7.9
10.4
6.2
8.7
Max
14.5
18.0
9.3
12.8
15.0
18.5
9.7
13.2
T
A
= −40°C
to
+85°C
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
8.5
6.0
0
0
4.5
3.0
7.5
5.0
7.5
5.0
55
40
95
55
1.5
1.5
ns
MHz
ns
15
50
15
50
50
ns
ns
Max
17.5
21.0
11.0
14.5
18.5
22.0
11.5
15.0
ns
ns
Units
C
L
(pF)
15
50
15
50
15
50
15
50
Note 4:
Parameter guaranteed by design. t
OSLH
=
|t
PLHm
−
t
PLHn
|, t
OSHL
=
|t
PHLm
−
t
PHLn
|
Capacitance
Symbol
C
IN
C
PD
Input Capacitance
Power Dissipation Capacitance (Note 5)
Parameter
T
A
= +25°C
Min
Typ
4
29
Max
10
T
A
= −40°C
to
+85°C
Min
Max
10
Units
pF
pF
Note 5:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
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