SN54ABT377, SN74ABT377A
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLOCK ENABLE
SCBS156E – FEBRUARY 1991 – REVISED JANUARY 1997
D
D
D
D
D
D
State-of-the-Art
EPIC-
ΙΙ
B
™
BiCMOS Design
Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
Typical V
OLP
(Output Ground Bounce) < 1 V
at V
CC
= 5 V, T
A
= 25°C
High-Drive Outputs (–32-mA I
OH
, 64-mA I
OL
)
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Plastic (N) and Ceramic (J) DIPs, and
Ceramic Flat (W) Package
SN54ABT377 . . . J OR W PACKAGE
SN74ABT377A . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
CLKEN
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
SN54ABT377 . . . FK PACKAGE
(TOP VIEW)
These 8-bit positive-edge-triggered D-type
flip-flops with a clock (CLK) input are particularly
suitable for implementing buffer and storage
registers, shift registers, and pattern generators.
Data (D) input information that meets the setup
time requirements is transferred to the Q outputs
on the positive-going edge of the clock pulse if the
common clock-enable (CLKEN) input is low.
Clock triggering occurs at a particular voltage
level and is not directly related to the transition
time of the positive-going pulse. When the
buffered clock (CLK) input is at either the high or
low level, the D-input signal has no effect at the
output. The circuits are designed to prevent false
clocking by transitions at CLKEN.
2D
2Q
3Q
3D
4D
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
8Q
8D
7D
7Q
6Q
6D
description
The SN54ABT377 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74ABT377A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
CLKEN
H
L
L
X
CLK
X
↑
↑
H or L
D
X
H
L
X
OUTPUT
Q
Q0
H
L
Q0
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
©
1997, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
4Q
GND
CLK
5Q
5D
1D
1Q
CLKEN
V
CC
1
SN54ABT377, SN74ABT377A
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLOCK ENABLE
SCBS156E – FEBRUARY 1991 – REVISED JANUARY 1997
logic symbol
†
1
CLKEN
CLK
1D
2D
3D
4D
5D
6D
7D
8D
11
3
4
7
8
13
14
17
18
G1
1C2
2D
2
5
6
9
12
15
16
19
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
CLK
11
1
CLKEN
3
1D
C1
2
1Q
1D
To Seven Other Channels
2
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
SN54ABT377, SN74ABT377A
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLOCK ENABLE
SCBS156E – FEBRUARY 1991 – REVISED JANUARY 1997
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, V
I
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, V
O
. . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
Current into any output in the low state, I
O
: SN54ABT377 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74ABT377A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, I
IK
(V
I
< 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA
Output clamp current, I
OK
(V
O
< 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Package thermal impedance,
θ
JA
(see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128°C/W
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages,
which use a trace length of zero.
recommended operating conditions (see Note 3)
SN54ABT377
MIN
VCC
VIH
VIL
VI
IOH
IOL
∆t/∆v
Supply voltage
High-level input voltage
Low-level input voltage
Input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Outputs enabled
–55
0
4.5
2
0.8
VCC
–24
48
5
125
–40
0
MAX
5.5
SN74ABT377A
MIN
4.5
2
0.8
VCC
–32
64
5
85
MAX
5.5
UNIT
V
V
V
V
mA
mA
ns/V
°C
TA
Operating free-air temperature
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
3
SN54ABT377, SN74ABT377A
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLOCK ENABLE
SCBS156E – FEBRUARY 1991 – REVISED JANUARY 1997
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VCC = 4.5 V,
VCC = 4.5 V,
VCC = 5 V,
VCC = 4 5 V
4.5
VOL
Vhys
II
Ioff
ICEX
IO‡
ICC
∆I
CC§
Ci
VCC = 4 5 V
4.5
TEST CONDITIONS
II = –18 mA
IOH = –3 mA
IOH = –3 mA
IOH = –24 mA
IOH = –32 mA
IOL = 48 mA
IOL = 64 mA
100
VCC = 5.5 V,
VCC = 0,
VCC = 5.5 V,
VCC = 5.5 V,
VI = VCC or GND
VI or VO
≤
4.5 V
VO = 5.5 V
VO = 2.5 V
Outputs high
–50
Outputs high
Outputs low
–100
1
24
±1
±100
50
–180
250
30
1.5
–50
50
–180
250
30
1.5
–50
±1
±1
±100
50
–180
250
30
1.5
TA = 25°C
MIN TYP†
MAX
–1.2
2.5
3
2
2*
0.55
0.55*
0.55
0.55
2.5
3
2
2
V
mV
µA
µA
µA
mA
µA
mA
mA
pF
SN54ABT377
MIN
MAX
–1.2
2.5
3
V
SN74ABT377A
MIN
MAX
–1.2
UNIT
V
VOH
,
,
VCC = 5.5 V, IO = 0,
VI = VCC or GND
VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND
VI = 2.5 V or 0.5 V
3.5
* On products compliant to MIL-PRF-38535, this parameter does not apply.
† All typical values are at VCC = 5 V.
‡ Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
§ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
SN54ABT377
VCC = 5 V,
TA = 25°C
MIN
fclock
tw
tsu
th
Clock frequency
Pulse duration
Setup time before CLK↑
Hold time after CLK↑
CLK high or low
Data high or low
CLKEN high or low
Data high or low
CLKEN high or low
0
3.3
2
3
1.8¶
1.8¶
MAX
150
0
3.3
2.5
3
1.8¶
1.8¶
150
MHz
ns
ns
MIN
MAX
UNIT
ns
¶ This data sheet limit may vary among suppliers.
4
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
SN54ABT377, SN74ABT377A
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLOCK ENABLE
SCBS156E – FEBRUARY 1991 – REVISED JANUARY 1997
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
SN74ABT377A
VCC = 5 V,
TA = 25°C
MIN
fclock
tw
tsu
th
Clock frequency
Pulse duration
Setup time before CLK↑
Hold time after CLK↑
CLK high or low
Data high or low
CLKEN high or low
Data high or low
CLKEN high or low
0
3.3
2
3
1.8†
1.2†
MAX
150
0
3.3
2.5
3
1.8†
1.2†
150
MHz
ns
ns
MIN
MAX
UNIT
ns
† This data sheet limit may vary among suppliers.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C
L
= 50 pF (unless otherwise noted) (see Figure 1)
SN54ABT377
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
TA = 25°C
MIN
fmax
tPLH
tPHL
150
CLK
Q
2.2
3.1
4.5
5.3
6
6.8
TYP
MAX
150
2.2
2
7
7.6
MHz
ns
MIN
MAX
UNIT
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C
L
= 50 pF (unless otherwise noted) (see Figure 1)
SN74ABT377A
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
TA = 25°C
MIN
fmax
tPLH
tPHL
150
CLK
Q
2.2
2.6†
4.5
5.3
6
6.8
TYP
MAX
150
2.2
2.6†
6.5
7.3
MHz
ns
MIN
MAX
UNIT
† This data sheet limit may vary among suppliers.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
5
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