INTEGRATED CIRCUITS
DATA SHEET
74AHC04; 74AHCT04
Hex inverter
Product specification
Supersedes data of 1999 Feb 25
File under Integrated Circuits, IC06
1999 Sep 27
Philips Semiconductors
Product specification
Hex inverter
FEATURES
•
ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000 V
MM EIA/JESD22-A115-A
exceeds 200 V
•
Balanced propagation delays
•
Inputs accepts voltages higher than
V
CC
•
For AHC only:
operates with CMOS input levels
•
For AHCT only:
operates with TTL input levels
•
Specified from
−40
to +85 and +125
°C.
DESCRIPTION
The 74AHC/AHCT04 are high-speed
Si-gate CMOS devices and are pin
compatible with low power Schottky
TTL (LSTTL). They are specified in
compliance with JEDEC standard
No. 7A.
The 74AHC/AHCT04 provide six
inverting buffers.
FUNCTION TABLE
See note 1.
INPUT nA
L
H
Note
1. H = HIGH voltage level;
L = LOW voltage level.
OUTPUT nY
H
L
C
I
C
PD
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
≤
3.0 ns.
74AHC04; 74AHCT04
TYPICAL
SYMBOL
t
PHL
/t
PLH
PARAMETER
propagation
delay nA to nY
input
capacitance
CONDITIONS
AHC
C
L
= 15 pF;
V
CC
= 5 V
V
I
= V
CC
or GND
3.0
4.0
13.5
AHCT
3.0
4.0
13.9
ns
pF
pF
UNIT
power dissipation C
L
= 50 pF;
capacitance
f = 1 MHz;
notes 1 and 2
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
+
∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts.
2. The condition is V
I
= GND to V
CC
.
PINNING
PIN
1, 3, 5, 9, 11 and 13
2, 4, 6, 8, 10 and 12
7
14
SYMBOL
1A to 6A
1Y to 6Y
GND
V
CC
DESCRIPTION
data inputs
data outputs
ground (0 V)
DC supply voltage
1999 Sep 27
2
Philips Semiconductors
Product specification
Hex inverter
ORDERING INFORMATION
OUTSIDE NORTH
AMERICA
74AHC04D
74AHC04PW
74AHCT04D
74AHCT04PW
74AHC04; 74AHCT04
PACKAGES
NORTH AMERICA
PINS
74AHC04D
74AHC04PW DH
74AHCT04D
74AHCT04PW DH
14
14
14
14
PACKAGE
SO
TSSOP
SO
TSSOP
MATERIAL
plastic
plastic
plastic
plastic
CODE
SOT108-1
SOT402-1
SOT108-1
SOT402-1
handbook, halfpage
1A
1Y
2A
2Y
3A
3Y
GND
1
2
3
4
5
6
7
MNA340
14 VCC
13 6A
12 6Y
04
11 5A
10 5Y
9
4A
handbook, halfpage
A
Y
MNA341
8 4Y
Fig.1 Pin configuration.
Fig.2 Logic diagram (one gate).
handbook, halfpage
handbook, halfpage
1
1
1A
1Y
2
3
1
2
1
3
2A
2Y
4
4
5
3A
3Y
6
5
1
6
9
4A
4Y
8
9
1
8
11
5A
5Y
10
11
1
10
13
6A
6Y
12
13
1
MNA343
MNA342
12
Fig.3 Functional diagram.
Fig.4 IEC logic symbol.
1999 Sep 27
3
Philips Semiconductors
Product specification
Hex inverter
RECOMMENDED OPERATING CONDITIONS
74AHC
SYMBOL
V
CC
V
I
V
O
T
amb
PARAMETER
DC supply voltage
input voltage
output voltage
operating ambient temperature
range
see DC and AC
characteristics per
device
V
CC
= 5 V
±0.5
V
CONDITIONS
MIN.
2.0
0
0
−40
−40
74AHC04; 74AHCT04
74AHCT
UNIT
TYP. MAX.
5.0
−
−
+25
+25
−
−
5.5
5.5
V
CC
+85
V
V
V
°C
TYP. MAX. MIN.
5.0
−
−
+25
+25
−
−
5.5
5.5
V
CC
+85
4.5
0
0
−40
+125
−40
100
20
−
−
+125
°C
−
20
ns/V
t
r
,t
f
(∆t/∆f) input rise and fall times except
for Schmitt-trigger inputs
V
CC
= 3.3 V
±0.3
V
−
−
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).
SYMBOL
V
CC
V
I
I
IK
I
OK
I
O
I
CC
T
stg
P
D
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. For SO packages: above 70
°C
the value of P
D
derates linearly with 8 mW/K.
For TSSOP packages: above 60
°C
the value of P
D
derates linearly with 5.5 mW/K.
PARAMETER
DC supply voltage
input voltage range
DC input diode current
DC output diode current
DC V
CC
or GND current
storage temperature range
power dissipation per package
for temperature range:
−40
to +125
°C;
note 2
V
I
<
−0.5
V; note 1
V
O
<
−0.5
V or V
O
> V
CC
+ 0.5 V; note 1
CONDITIONS
MIN. MAX. UNIT
−0.5
−0.5
−
−
−
−
−65
−
+7.0
+7.0
−20
±20
±25
±75
500
V
V
mA
mA
mA
mA
mW
DC output source or sink current
−0.5
V < V
O
< V
CC
+ 0.5 V
+150
°C
1999 Sep 27
4
Philips Semiconductors
Product specification
Hex inverter
DC CHARACTERISTICS
74AHC04; 74AHCT04
74AHC family
Over recommended operating conditions; voltage are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
PARAMETER
OTHER
V
IH
HIGH-level input
voltage
V
CC
(V)
2.0
3.0
5.5
V
IL
LOW-level input
voltage
2.0
3.0
5.5
V
OH
HIGH-level output
voltage; all
outputs
HIGH-level output
voltage
V
I
= V
IH
or V
IL
;
I
O
=
−50 µA
V
I
= V
IH
or V
IL
;
I
O
=
−4.0
mA
V
I
= V
IH
or V
IL
;
I
O
=
−8.0
mA
V
OL
LOW-level output
voltage; all
outputs
LOW-level output
voltage
V
I
= V
IH
or V
IL
;
I
O
= 50
µA
V
I
= V
IH
or V
IL
;
I
O
= 4 mA
V
I
= V
IH
or V
IL
;
I
O
= 8 mA
I
I
I
OZ
I
CC
C
I
input leakage
current
3-state output
OFF current
quiescent supply
current
input capacitance
V
I
= V
CC
or GND
2.0
3.0
4.5
3.0
4.5
2.0
3.0
4.5
3.0
4.5
5.5
MIN.
1.5
2.1
−
−
−
1.9
2.9
4.4
−
−
−
−
−
2.0
3.0
4.5
25
TYP.
−
−
−
0.5
0.9
1.65
−
−
−
−
−
0.1
0.1
0.1
0.36
0.36
0.1
T
amb
(°C)
−40
to +85
−
−
0.5
0.9
1.65
−
−
−
−40
to +125 UNIT
−
−
0.5
0.9
1.65
−
−
−
V
V
V
MAX. MIN. MAX. MIN. MAX.
1.5
2.1
−
−
−
1.9
2.9
4.4
1.5
2.1
−
−
−
1.9
2.9
4.4
V
3.85
−
3.85
−
3.85
−
2.58
−
3.94
−
−
−
−
−
−
−
−
−
−
0
0
0
−
−
−
−
−
3
2.48
−
3.8
−
−
−
−
−
−
−
0.1
0.1
0.1
0.44
0.44
1.0
±2.5
40
10
2.40
−
3.70
−
−
−
−
−
−
−
−
−
−
0.1
0.1
0.1
0.55
0.55
2.0
V
V
µA
V
I
= V
IH
or V
IL
;
5.5
V
O
= V
CC
or GND
V
I
= V
CC
or GND;
I
O
= 0
5.5
−
±0.25 −
4.0
10
−
−
±10.0 µA
80
10
µA
pF
1999 Sep 27
5
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