Model 635
LVPECL or LVDS CLOCK OSCILLATOR
FEATURES
•
•
•
•
•
•
•
•
•
•
•
Standard 7.5x5.0mm Surface Mount Footprint
Differential LVPECL or LVDS Output
Fundamental or Overtone Crystal
Low Phase Jitter
Frequency Range 19.44 – 250 MHz
Frequency Stability, ±50 ppm Standard
(±20 ppm, ±25 ppm and ±100 ppm available)
+2.5Vdc or +3.3Vdc Operation
Operating Temperature to –40°C to +85°C
Output Enable Standard
Tape & Reel Packaging
RoHS/Green Compliant (6/6)
DESCRIPTION
The Model 635 is a ceramic packaged Clock
oscillator offering reduced size and enhanced
stability. The small size means it is perfect for
any application. The enhanced stability means it
is the perfect choice for today’s communications
applications that require tight frequency control.
ORDERING INFORMATION
635
OUTPUT TYPE
P = PECL,
Pin 1 Enable Pin 2 N.C. (standard)
L = LVDS,
Pin 1 Enable Pin 2 N.C. (standard)
E = PECL,
Pin 2 Enable Pin 1 N.C.
V = LVDS,
Pin 2 Enable Pin 1 N.C.
M
FREQUENCY IN MHz
M - indicates MHz and decimal point.
Frequency is recorded with minimum 4
significant digits to the right of the "M".
FREQUENCY STABILITY
6
5
3
2
=
=
=
=
±
±
±
±
20 ppm *
25 ppm
50 ppm (standard)
100 ppm
(over -40°C to 85°C only)
SUPPLY VOLTAGE
2 = 2.5 Vdc
3 = 3.3 Vdc
OPERATING TEMPERATURE RANGE
C = -20°C to +70°C (standard)
I = -40°C to +85°C
* - Not available with 'I' temperature range. Consult factory for availability before ordering.
Example Part Number: 635P3C3155M5200
Document No. 008-0284-0
Page 1 - 4
Rev. D
٠ ٠ ٠
CTS Electronic Components, Inc.
٠
171 Covington Drive
٠
Bloomingdale, IL 60108
٠ ٠ ٠
٠ ٠ ٠
www.ctscorp.com
٠ ٠ ٠
7.5x5.0mm Low Cost
LVPECL or LVDS Clock Oscillator
Model 635
ELECTRICAL CHARACTERISTICS
Absolute Maximums
PARAMETER
Maximum Supply Voltage
Storage Temperature
Frequency Range
(See Note 1)
LVPECL and LVDS
Frequency Stability
(See Note 2 and Ordering Information)
SYMBOL
V
CC
T
STG
f
O
∆f/f
O
T
A
V
CC
I
CC
T
S
tjrms
pjrms
V
IH
V
IL
I
IL
T
PLZ
R
L
SYM
V
OH
V
OL
T
R
, T
F
±5%
CONDITIONS
-
-
-
-
-
MIN
-0.5
-55
19.44
-
-20
-40
2.38
3.14
-
-
-
-
-
0.7*V
CC
-
-
-
-
45
V
CC
- 1.025V
-
-
-
-
45
247
-
1.125
-
-
0.9
-
-
TYP
-
-
-
-
MAX
5.0
125
250
20, 25, 50
or 100
70
85
2.63
3.47
100
60
5
1
5
-
0.3*V
CC
20
5
-
55
-
V
CC
- 1.62V
1.0
0.6
-
55
454
50
1.375
50
1.6
-
1.0
0.6
UNIT
V
°C
MHz
± ppm
°C
V
mA
ms
ps RMS
ps RMS
V
uA
ns
Ohms
%
V
Operating Temperature
Commercial
Industrial
Supply Voltage
Supply Current
LVPECL
LVDS
Start Up Time
Phase Jitter
Period Jitter
Enable Function
Enable Input Voltage
Disable Input Voltage
Disable Current
Enable Time
LVPECL WAVEFORM
Output Load
Output Duty Cycle
Output Voltage Levels
Logic '1' Level
Logic '0' Level
Rise and Fall Time
f
O
< 100 MHz
f
O
> 100 MHz
LVDS WAVEFORM
Output Load
Output Duty Cycle
Differential Output Voltage
Differential Output Error
Offset Voltage
Offset Error
Output Voltage Levels
Logic '1' Level
Logic '0' Level
Rise and Fall Time
f
O
< 100 MHz
f
O
> 100 MHz
25
2.5
3.3
50
25
3
-
-
-
-
-
-
50
-
-
-
0.8
0.5
100
-
350
-
1.25
-
1.43
1.1
0.8
0.5
Maximum Load
Application of V
CC
Bandwidth 12 kHz - 20 MHz
-
Standby
Pin 1 or Pin 2 Logic '1', Output Enabled
Pin 1 or Pin 2 Logic '0', Output Disabled
Pin 1 or Pin 2 Logic '1' , Output Disabled
Pin 1 or Pin 2 Logic '1'
-
Electrical and Waveform Parameters
@ V
CC
- 1.3V
PECL Load
PECL Load
@ 20% - 80% Levels
ns
R
L
SYM
V
OD
-
V
OS
-
V
OH
V
OL
T
R
, T
F
Between Outputs
@ 1.25V
RL = 100 Ohms
-
LVDS Load
-
LVDS Load
LVDS Load
@ 20% - 80% Levels
Ohms
%
mV
mV
V
mV
V
ns
Notes:
1. For frequencies above 160 MHz consult factory for availability.
2. Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 10 year aging.
PECL/LVDS OUTPUT WAVEFORM
Tr
Tf
OUT
V
OH
80%
V
OS
50%
20%
OUT
UPTIME (t)
PERIOD (T)
V
OL
ENABLE TRUTH TABLE
PIN 1 or PIN 2 PIN 4 / PIN 5
Logic ‘1’
Output
Open
Output
Logic ‘0’
High Imp.
DUTY CYCLE = t/T x 100 (%)
Document No. 008-0284-0
Page 2 - 4
Rev. D
٠ ٠ ٠
CTS Electronic Components, Inc.
٠
171 Covington Drive
٠
Bloomingdale, IL 60108
٠٠٠
7.5x5.0mm Low Cost
LVPECL or LVDS Clock Oscillator
TEST CIRCUIT, PECL LOAD
Vcc - 2.0V
Model 635
TEST CIRCUIT, LVDS LOAD
CH2
(Thevenin Equivalent)
R
L
50
CH2
+
mA
-
R
L
100
CH1
6
5
D.U.T.
1
2
3
4
+
mA
-
R
L
50
Vcc - 2.0V
3
CH1
6
5
D.U.T.
1
2
4
(Thevenin Equivalent)
+
POWER
SUPPLY
+
VM
-
0.01uF
+
POWER
SUPPLY
+
VM
-
0.01uF
-
-
Enable Input or N.C.
N.C. or Enable Input
Enable Input or N.C.
N.C. or Enable Input
MECHANICAL SPECIFICATIONS
PACKAGE DRAWING
(7.7)
MAX
0.303
PIN 1 IDENTIFIER
(1.4)
0.055
(1.27)
0.050
(5.0 ±0.2)
0.197 ±0.008
(3.73)
0.147
4
5
6
MARKING INFORMATION
1.
2.
3.
4.
** - Manufacturing Site Code.
YYWW – Date code, YY – year, WW – week.
Truncated CTS part number.
XXXMXXXX - Frequency marked with 4
significant digits after the ‘M’.
CTS ** YYWW
635P3C3
●
XXXMXXXX
3
2
1
(2.54)
0.100
(2.0)
MAX
0.079
(5.08)
0.200
Key:
(mm)
Inch
NOTES
1. Termination pads (e4), barrier-plating is nickel
(Ni) with gold (Au) flash plate.
2. Reflow conditions per JEDEC J-STD-020.
D.U.T. PIN ASSIGNMENTS
SUGGESTED SOLDER PAD GEOMETRY
.071 [1.80]
C
BYPASS
6
5
4
.165 [4.20]
PIN
1
2
3
4
5
6
SYMBOL
EOH or N.C.
EOH or N.C.
GND
Output
Output
V
CC
DESCRIPTION
Enable (std) or optional No Connect
No Connect (std) or optional Enable
Circuit & Package Ground
RF Output
Complimentary RF Output
Supply Voltage
.079 [2.00]
1
2
.100 [2.54]
.200 [5.08]
Key:
[mm]
Inch
3
Document No. 008-0284-0
Page 3 - 4
Rev. D
٠ ٠ ٠
CTS Electronic Components, Inc.
٠
171 Covington Drive
٠
Bloomingdale, IL 60108
٠٠٠
7.5x5.0mm Low Cost
LVPECL or LVDS Clock Oscillator
Model 635
TAPE AND REEL INFORMATION
DIMENSIONS IN MILLIMETERS
17.5
Ø13
4.0
8.0
Ø1.50
1.75
2.40
2.10
2.0
120°
8.40
7.90
16.0
Ø60
Ø180
5.70
5.40
DIRECTION OF FEED
Ø23
Device quantity is 1,000 pieces per 180mm reel.
ENVIRONMENTAL SPECIFICATIONS
Temperature Cycle:
Mechanical Shock:
Sinusoidal Vibration:
Gross Leak:
Fine Leak:
Resistance to Solder Heat:
High Temperature Operating Bias:
Frequency Aging:
Moisture Sensitivity Level:
400 cycles from –55°C to +125°C, 10 minute dwell at each temperature, 1
minute transfer time between temperatures.
1,500g’s, 0.5mS duration, ½ sinewave, 3 shocks each direction along 3
mutually perpendicular planes (18 total shocks).
0.06 inches double amplitude, 10 to 55 Hz and 20g’s, 55 to 2,000 Hz, 3 cycles
each in 3 mutually perpendicular planes (9 times total).
No leak shall appear while immersed in an FC40 or equivalent liquid at
+125°C for 20 seconds.
Mass spectrometer leak rates less than 2x10
-8
ATM cc/sec air equivalent.
Product must survive 3 reflows of +260°C peak, 10 seconds maximum.
2,000 hours at +125°C, maximum bias, disregarding frequency shift.
1,000 hours at +85°C, full bias, less than ±5 ppm shift.
Level 1 per JEDEC J-STD-020.
QUALITY AND RELIABILITY
Quality systems meet or exceed the requirements of ISO 9000:2000 standards.
Document No. 008-0284-0
Page 4 - 4
Rev. D
٠ ٠ ٠
CTS Electronic Components, Inc.
٠
171 Covington Drive
٠
Bloomingdale, IL 60108
٠٠٠
stm32/stm8
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