74LVCV2G66
Overvoltage tolerant bilateral switch
Rev. 6 — 22 July 2015
Product data sheet
1. General description
The 74LVCV2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device.
The 74LVCV2G66 provides two single pole single throw analog or digital switches. Each
switch includes an overvoltage tolerant input/output terminal (pin nZ), an output/input
terminal (pin nY) and low-power active HIGH enable input (pin nE).
The overvoltage tolerant switch terminals allow the switching of signals in excess of V
CC
.
The low-power enable input eliminates the necessity of using current limiting resistors in
portable applications when using control logic signals much lower than V
CC
. These inputs
are also overvoltage tolerant.
2. Features and benefits
Wide supply voltage range from 2.3 V to 5.5 V
Ultra low-power operation
Very low ON resistance:
8.0
(typical) at V
CC
= 2.7 V
7.5
(typical) at V
CC
= 3.3 V
7.3
(typical) at V
CC
= 5.0 V.
5 V tolerant input for interfacing with 5 V logic
High noise immunity
Switch handling capability of 32 mA
CMOS low-power consumption
Latch-up performance exceeds 250 mA
Incorporates overvoltage tolerant analog switch technology
Switch accepts voltages up to 5.5 V independent of V
CC
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C
NXP Semiconductors
74LVCV2G66
Overvoltage tolerant bilateral switch
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74LVCV2G66DP
74LVCV2G66DC
74LVCV2G66GT
74LVCV2G66GD
74LVCV2G66GM
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
Name
TSSOP8
VSSOP8
XSON8
XSON8
XQFN8
Description
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
plastic extremely thin small outline package; no leads;
8 terminals; body 1
1.95
0.5 mm
plastic extremely thin small outline package; no leads;
8 terminals; body 3
2
0.5 mm
plastic, extremely thin quad flat package; no leads;
8 terminals; body 1.6
1.6
0.5 mm
Version
SOT505-2
SOT765-1
SOT833-1
SOT996-2
SOT902-2
Type number
4. Marking
Table 2.
Marking codes
Marking code
[1]
Y66
Y66
Y66
Y66
Y66
Type number
74LVCV2G66DP
74LVCV2G66DC
74LVCV2G66GT
74LVCV2G66GD
74LVCV2G66GM
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
74LVCV2G66
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
2 of 25
NXP Semiconductors
74LVCV2G66
Overvoltage tolerant bilateral switch
Z
Y
E
V
CC
001aaa532
Fig 3.
Logic diagram (one switch)
6. Pinning information
6.1 Pinning
74LVCV2G66
1Z
1Y
2E
GND
1
2
3
4
001aai213
8
7
6
5
V
CC
1E
2Y
2Z
Fig 4.
Pin configuration SOT505-2 and SOT765-1
Fig 5.
Pin configuration SOT833-1
74LVCV2G66
1Z
1Y
2E
GND
1
2
3
4
8
7
6
5
V
CC
1E
2Y
2Z
001aai214
Transparent top view
Fig 6.
Pin configuration SOT996-2
Fig 7.
Pin configuration SOT902-2
74LVCV2G66
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
3 of 25
NXP Semiconductors
74LVCV2G66
Overvoltage tolerant bilateral switch
6.2 Pin description
Table 3.
Symbol
Pin description
Pin
SOT505-2, SOT765-1,
SOT902-2
SOT996-2 and SOT833-1
1Z
1Y
2E
GND
2Z
2Y
1E
V
CC
1
2
3
4
5
6
7
8
7
6
5
4
3
2
1
8
independent input or output (overvoltage tolerant)
independent input or output
enable input (active HIGH)
ground (0 V)
independent input or output (overvoltage tolerant)
independent input or output
enable input (active HIGH)
supply voltage
Description
7. Functional description
Table 4.
Input nE
L
H
[1]
H = HIGH voltage level; L = LOW voltage level.
Function table
[1]
Switch
OFF-state
ON-state
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
I
IK
I
SK
V
SW
I
SW
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input voltage
input clamping current
switch clamping current
switch voltage
switch current
supply current
ground current
storage temperature
total power dissipation
Conditions
[1]
Min
0.5
0.5
50
-
0.5
-
-
100
65
Max
+6.5
+6.5
-
50
+6.5
50
100
-
+150
250
Unit
V
V
mA
mA
V
mA
mA
mA
C
mW
V
I
<
0.5
V or V
I
> 6.5 V
V
I
<
0.5
V or V
I
> 6.5 V
enable and disable mode
V
SW
>
0.5
V or V
SW
< 6.5 V
T
amb
=
40 C
to +125
C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP8 package: above 55
C,
the value of P
tot
derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110
C,
the value of P
tot
derates linearly with 8 mW/K.
For XSON8 and XQFN8 packages: above 118
C,
the value of P
tot
derates linearly with 7.8 mW/K.
74LVCV2G66
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
4 of 25
NXP Semiconductors
74LVCV2G66
Overvoltage tolerant bilateral switch
9. Recommended operating conditions
Table 6.
Symbol
V
CC
V
I
V
SW
T
amb
t/V
Recommended operating conditions
Parameter
supply voltage
input voltage
switch voltage
ambient temperature
input transition rise and fall rate
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 5.5 V
[1]
[2]
[2]
Conditions
Min
2.3
0
Typ
-
-
-
-
-
-
Max
5.5
5.5
5.5
+125
20
10
Unit
V
V
V
C
ns/V
ns/V
enable and disable mode
[1]
0
40
-
-
To avoid sinking GND current from terminal nZ when switch current flows in terminal nY, the voltage drop across the bidirectional switch
must not exceed 0.4 V. If the switch current flows into terminal nZ, no GND current flows from terminal nY. In this case, there is no limit
for the voltage drop across the switch.
Applies to control signal levels.
[2]
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IH
Conditions
40 C
to +85
C
Min
HIGH-level
V
CC
= 2.3 V to 2.7 V
input voltage V = 3.0 V to 3.6 V
CC
V
CC
= 4.5 V to 5.5 V
V
IL
LOW-level
V
CC
= 2.3 V to 2.7 V
input voltage V = 3.0 V to 3.6 V
CC
V
CC
= 4.5 V to 5.5 V
I
I
I
S(OFF)
input leakage pin nE; V
I
= 5.5 V or GND;
current
V
CC
= 0 V to 5.5 V
OFF-state
leakage
current
ON-state
leakage
current
supply
current
additional
supply
current
input
capacitance
OFF-state
capacitance
V
CC
= 2.3 V to 5.5 V; see
Figure 8
[2]
40 C
to +125
C
Unit
Min
0.6V
CC
2.0
0.55V
CC
-
-
-
-
-
Max
-
-
-
0.1V
CC
0.5
5
10
V
V
V
V
V
A
A
-
-
-
Typ
[1]
-
-
-
-
-
-
0.1
0.1
Max
0.6V
CC
2.0
0.55V
CC
-
-
-
-
-
0.1V
CC
0.5
0.15V
CC
5
10
0.15V
CC
V
[2][3]
I
S(ON)
V
CC
= 2.3 V to 5.5 V; see
Figure 9
[2][3]
-
0.1
10
-
10
A
I
CC
V
I
= 5.5 V or GND;
V
SW
= GND or V
CC
;
V
CC
= 2.3 V to 5.5 V
pin nE; V
I
= V
CC
0.6 V;
V
SW
= GND or V
CC
;
V
CC
= 3.0 V to 5.5 V
[2]
-
0.1
10
-
40
A
I
CC
[2]
-
0.1
5
-
50
A
C
I
C
S(OFF)
-
-
2.5
8.0
-
-
-
-
-
-
pF
pF
74LVCV2G66
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
5 of 25
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