IDT54/74FCT521/A/B/C
FAST CMOS 8-BIT IDENTITY COMPARATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS
8-BIT IDENTITY
COMPARATOR
FEATURES:
•
•
•
•
•
IDT54/74FCT521/A/B/C
•
•
•
•
•
•
•
•
IDT54/74FCT521 equivalent to FAST™ speed
IDT54/74FCT521A up to 35% faster than FAST
IDT54/74FCT521B up to 35% faster than FAST
IDT54/74FCT521C up to 60% faster than FAST
Eqivalent to FAST output drive over full temperature and voltage
supply extremes
I
OL
= 48mA (commercial) and 32mA (military)
CMOS power levels (1mW typ. static)
TTL input and output level compatible
CMOS output level compatible
Substantially lower input current levels than FAST (5µA max.)
µ
MIlitary product compliant to MIL-STD-883, Class B
Meets or exceeds JEDEC Standard 18 specifications
Available in the following packages:
– Commercial: SOIC
– Military: CERDIP, LCC
DESCRIPTION:
The FCT521 is an 8-bit identity comparator built using an advanced dual
metal CMOS technology. These devices compare two words of up to eight
bits each and provide a low output when the two words match bit for bit. The
expansion input
I
A = B
also serves as an active low enable input.
FUNCTIONAL BLOCK DIAGRAM
A
0
B
0
A
1
B
1
A
2
B
2
A
3
B
3
A
4
B
4
A
5
B
5
A
6
B
6
A
7
B
7
I
A=B
2
3
4
5
6
7
8
9
19
11
12
13
14
15
16
17
18
1
O
A=B
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1
JUNE 2002
DSC-4617/6
© 2002 Integrated Device Technology, Inc.
IDT54/74FCT521/A/B/C
FAST CMOS 8-BIT IDENTITY COMPARATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATION
I
A=B
A
0
B
0
A
1
B
1
A
2
B
2
A
3
B
3
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
O
A=B
B
7
A
7
B
6
A
6
B
5
A
5
B
4
B
3
A
4
B
4
3
2
1
20
19
18
17
16
15
14
9
10
11
12
13
B
0
A
1
B
1
A
2
B
2
A
3
A
0
INDEX
I
A=B
O
A=B
V
CC
4
5
6
7
8
B
7
A
7
B
6
A
6
B
5
A
4
CERDIP/ SOIC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
V
TERM
(3)
T
A
T
BIAS
T
STG
P
T
I
OUT
Rating
Terminal Voltage
with Respect to GND
Terminal Voltage
with Respect to GND
Operating Temperature
Temperature under BIAS
Storage Temperature
Power Dissipation
DC Output Current
0 to +70
–55 to +125
–55 to +125
0.5
120
–55 to +125
–65 to +135
–65 to +150
0.5
120
°C
°C
°C
W
mA
–0.5 to V
CC
–0.5 to V
CC
V
Commercial
–0.5 to +7
Military
–0.5 to +7
Unit
V
PIN DESCRIPTION
Pin Names
A
0
- A
7
B
0
- B
7
I
A
=
B
O
A
=
B
Word A Inputs
Word B Inputs
Expansion or Enable Input (Active LOW)
Identity Output (Active LOW)
Description
FUNCTION TABLE
(1)
Inputs
I
A = B
L
L
H
H
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
*
A
0 =
B
0,
A
1 =
B
1,
A
2 =
B
2, etc.
GND
LCC
TOP VIEW
A
5
Output
O
A = B
L
H
H
H
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Input and Vcc terminals only.
3. Output and I/O terminals only.
A, B
A = B*
A
≠
B
A = B*
A
≠
B
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
2
IDT54/74FCT521/A/B/C
FAST CMOS 8-BIT IDENTITY COMPARATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
- 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V ±5%, Military: T
A
= -55°C to +125°C, V
CC
= 5.0V ±10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
OS
V
OH
Off State (High Impedance)
Output Current
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Max.
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
V
CC
= Max.
Input LOW Current
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
V
O
= V
CC
V
O
= 2.7V
V
O
= 0.5V
V
O
= GND
Min.
2
—
—
—
—
—
—
—
—
—
—
–60
V
HC
V
HC
2.4
2.4
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
4.3
GND
GND
0.3
0.3
Max.
—
0.8
5
5
(4)
–5
(4)
–5
10
10
(4)
–10
(4)
–10
–1.2
—
—
—
—
—
V
LC
V
LC
(4)
0.5
0.5
µA
µA
Unit
V
V
V
CC
= Min., I
IN
= –18mA
V
CC
= Max., V
O
= GND
(3)
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= –32µA
V
CC
= Min
I
OH
= –300µA
V
IN
= V
IH
or V
IL
I
OH
= –12mA MIL
I
OH
= –15mA COM'L
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300µA
V
CC
= Min
I
OL
= 300µA
V
IN
= V
IH
or V
IL
I
OL
= 32mA MIL
I
OL
= 48mA COM'L
V
mA
V
V
OL
Output LOW Voltage
V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not ttested.
3
IDT54/74FCT521/A/B/C
FAST CMOS 8-BIT IDENTITY COMPARATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
- 0.2V
Symbol
I
CC
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
≥
V
HC
; V
IN
≤
V
LC
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
f
I
= 10MHz
One Bit Toggling
50% Duty Cycle
V
IN
≥
V
HC
V
IN
≤
V
LC
Min.
—
—
—
Typ.
(2)
0.2
0.5
0.15
Max.
1.5
2
0.25
Unit
mA
mA
mA/
MHz
I
C
Total Power Supply Current
(5,6)
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
—
1.7
2
4
5
mA
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of
∆I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + fiNi)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for register devices (zero for non-register devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - COMMERCIAL
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
Parameter
Propagation Delay
Ax or Bx to
O
A
=
B
Propagation Delay
I
A
=
B
to
O
A
=
B
Condition
C
L
= 50pF
R
L
= 500Ω
(1)
74FCT521A
Min.
(2)
Max.
1.5
7.2
1.5
6
74FCT521B
Min.
1.5
1.5
(2)
Max.
5.5
4.6
74FCT521C
Min.
Max.
1.5
4.5
(2)
Unit
ns
ns
1.5
4.1
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - MILITARY
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
Parameter
Propagation Delay
Ax or Bx to
O
A
=
B
Propagation Delay
I
A
=
B
to
O
A
=
B
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
54FCT521
Min.
(2)
Max.
1.5
15
1.5
9
54FCT521A
Min.
(2)
1.5
1.5
Max.
9.5
7.8
54FCT521B
Min.
(2)
Max.
1.5
7.3
1.5
6
Unit
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
4
IDT54/74FCT521/A/B/C
FAST CMOS 8-BIT IDENTITY COMPARATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
V
CC
500Ω
V
IN
Pulse
Generator
R
T
D.U.T
.
V
OUT
7.0V
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
Switch
Closed
Open
50pF
C
L
500Ω
All Other Tests
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
Octal link
Test Circuits for All Outputs
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
SU
t
H
t
REM
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
Octal link
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
Octal link
1.5V
1.5V
t
SU
t
H
Pulse Width
Set-Up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
t
PHL
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
Octal link
DISABLE
3V
1.5V
0V
3.5V
0.3V
t
PHZ
0.3V
1.5V
0V
V
OH
0V
Octal link
CONTROL
INPUT
t
PZL
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
3.5V
1.5V
t
PLZ
V
OL
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; Z
O
≤
50Ω; t
F
≤
2.5ns; t
R
≤
2.5ns.
5
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