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SCBS021D − FEBRUARY 1989 − REVISED NOVEMBER 1993
SN74BCT29821
10 BIT BUS INTERFACE FLIP FLOP
WITH 3 STATE OUTPUTS
DW OR NT PACKAGE
(TOP VIEW)
•
•
•
•
State-of-the-Art BiCMOS Design
Significantly Reduces I
CCZ
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
3-State Buffer-Type Outputs Drive Bus
Lines Directly
Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (NT)
description
This 10-bit bus-interface flip-flop features 3-state
outputs designed specifically for driving highly
capacitive or relatively low-impedance loads. It is
particularly suitable for implementing wider buffer
registers, I/O ports, bidirectional bus drivers with
parity, and working registers.
OE
1D
2D
3D
4D
5D
6D
7D
8D
9D
10D
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
10Q
CLK
The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs will
be true to the data (D) inputs.
A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high or
low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need
for interface or pullup components.
The output enable (OE) does not affect the internal operation of the flip-flops. Old data can be retained or new
data can be entered while the outputs are in the high-impedance state.
The SN74BCT29821 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OE
L
L
L
H
CLK
↑
↑
H or L
X
D
H
L
X
X
OUTPUT
Q
H
L
Q0
Z
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
1993, Texas Instruments Incorporated
POST OFFICE BOX 655303
POST OFFICE BOX 1443
•
HOUSTON, TEXAS 77251−1443
•
DALLAS, TEXAS 75265
2−1
SCBS021D − FEBRUARY 1989 − REVISED NOVEMBER 1993
SN74BCT29821
10 BIT BUS INTERFACE FLIP FLOP
WITH 3 STATE OUTPUTS
logic symbol
†
OE
CLK
1D
2D
3D
4D
5D
6D
7D
8D
9D
10D
1
13
2
3
4
5
6
7
8
9
10
11
EN
C1
1D
23
22
21
20
19
18
17
16
15
14
logic diagram (positive logic)
OE
CLK
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
10Q
To Nine Other Channels
1D
2
C1
1D
23
1Q
1
13
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
‡
Supply voltage range, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, V
I
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the disabled or power-off state, V
O
. . . . . . . . . . . . . . . . −0.5 V to 5.5 V
Voltage range applied to any output in the high state, V
O
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
CC
Input clamp current, I
IK
(V
I
< 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −30 mA
Current into any output in the low state, I
O
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
recommended operating conditions
MIN
VCC
VIH
VIL
IIK
IOH
IOL
TA
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature
0
4.5
2
0.8
−18
−24
48
70
NOM
5
MAX
5.5
UNIT
V
V
V
mA
mA
mA
°C
2−2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
•
SCBS021D − FEBRUARY 1989 − REVISED NOVEMBER 1993
SN74BCT29821
10 BIT BUS INTERFACE FLIP FLOP
WITH 3 STATE OUTPUTS
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VOL
II
IIH
IIL
IOS‡
IOZH
IOZL
ICCL
ICCH
ICCZ
Ci
Co
VCC = 4.5 V,
VCC = 4.5 V
VCC = 4.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5 V,
VCC = 5 V,
TEST CONDITIONS
II = −18 mA
IOH = − 15 mA
IOH = − 24 mA
IOL = 48 mA
VI = 7 V
VI = 2.7 V
VI = 0.5 V
VO = 0
VO = 2.7 V
VO = 0.5 V
Outputs open
Outputs open
Outputs open
VI = 2.5 V or 0.5 V
VO = 2.5 V or 0.5 V
25
6
2
5.5
7
MIN
2.4
2
0.42
−10
−75
0.55
0.1
−75
−0.2
−250
20
−20
35
10
6
TYP†
3.3
V
V
mA
µA
mA
mA
µA
µA
mA
mA
mA
pF
pF
MAX
−1.2
UNIT
V
† All typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
VCC = 5 V,
TA = 25°C
MIN
fclock
tw
tsu
th
Clock frequency
Pulse duration, CLK high or low
Setup time, data before CLK↑
Hold time, data after CLK↑
High or low
High or low
0
7
7
1
MAX
125
0
7
7
1
125
MHz
ns
ns
ns
MIN
MAX
UNIT
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C
L
= 50 pF (unless otherwise noted) (see Note 2)
PARAMETER
fmax
tPLH
tPHL
tPZH
tPZL
tPHZ
FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
TA = 25°C
MIN
125
1.5
CLK
OE
OE
Q
Q
Q
1.5
2
2
2
2
7.5
6.5
7.5
9
5
5
10
9
10
12
7
7
TYP
MAX
125
1.5
1.5
2
2
2
2
12
10
12
13
8
8
ns
ns
ns
MHz
MIN
MAX
UNIT
tPLZ
NOTE 2: Load circuits and voltage waveforms are shown in Section 1.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
•
2−3
SCBS021D − FEBRUARY 1989 − REVISED NOVEMBER 1993
SN74BCT29821
10 BIT BUS INTERFACE FLIP FLOP
WITH 3 STATE OUTPUTS
2−4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
•
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