SN54BCT245, SN74BCT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS013H – SEPTEMBER 1998 – REVISED MAY 2002
D
D
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
SN54BCT245 . . . J OR W PACKAGE
SN74BCT245 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
description
These octal bus transceivers are designed for
asynchronous communication between data
buses. The devices transmit data from the A bus
to the B bus or from the B bus to the A bus,
depending upon the level at the direction-control
(DIR) input. The output-enable (OE) input can be
used to disable the device so the buses are
effectively isolated.
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
OE
B1
B2
B3
B4
B5
B6
B7
B8
SN54BCT245 . . . FK PACKAGE
(TOP VIEW)
A3
A4
A5
A6
A7
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
A2
A1
DIR
V
CC
OE
B1
B2
B3
B4
B5
ORDERING INFORMATION
TA
PDIP – N
SOIC – DW
0°C to 70°C
SOP – NS
SSOP – DB
TSSOP – PW
CDIP – J
–55°C to 125°C
CFP – W
LCCC – FK
PACKAGE†
Tube
Tube
Tape and reel
Tape and reel
Tape and reel
Tape and reel
Tube
Tube
Tube
ORDERABLE
PART NUMBER
SN74BCT245N
SN74BCT245DW
SN74BVT245DWR
SN74BCT245NSR
SN74BCT245DBR
SN74BCT245PWR
SNJ54BCT245J
SNJ54BCT245W
SNJ54BCT245FK
TOP-SIDE
MARKING
SN74BCT245N
BCT245
BCT245
BT245
BT245
SNJ54BCT245J
SNJ54BCT245W
SNJ54BCT245FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
2002, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
•
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A8
GND
B8
B7
B6
1
SN54BCT245, SN74BCT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS013H – SEPTEMBER 1998 – REVISED MAY 2002
FUNCTION TABLE
INPUTS
OE
L
L
H
DIR
L
H
X
OPERATION
B data to A bus
A data to B bus
Isolation
logic diagram (positive logic)
DIR
1
19
OE
A1
2
18
B1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, V
I
: Control inputs (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
Voltage range applied to any output in the disabled or power-off state, V
O
. . . . . . . . . . . . . . . . . –0.5 V to 7 V
Voltage range applied to any output in the high state, V
O
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
CC
Current into any output in the low state, I
O
: SN54BCT245 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74BCT245 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Package thermal impedance,
θ
JA
(see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303
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DALLAS, TEXAS 75265
SN54BCT245, SN74BCT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS013H – SEPTEMBER 1998 – REVISED MAY 2002
recommended operating conditions (see Note 3)
SN54BCT245
MIN
VCC
VIH
VIL
IIK
IOH
IOL
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level
High level output current
Low-level
Low level output current
A port
B port
A port
B port
4.5
2
0.8
–18
–3
–12
20
48
NOM
5
MAX
5.5
SN74BCT245
MIN
4.5
2
0.8
–18
–3
–15
24
64
NOM
5
MAX
5.5
UNIT
V
V
V
mA
mA
mA
TA
Operating free-air temperature
– 55
125
0
70
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs,
literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
A port
VOH
B port
VCC = 4.5 V
VCC = 4.5 V,
VCC = 4 5 V
4.5
TEST CONDITIONS
II = –18 mA
IOH = –1 mA
IOH = – 3 mA
IOH = – 3 mA
IOH = –12 mA
IOH = – 15 mA
IOL = 20 mA
IOL = 24 mA
IOL = 48 mA
IOL = 64 mA
VI = 5 5 V
5.5
VI = 2 7 V
2.7
VI = 0 5 V
0.5
VO = 0
– 60
–100
57
36
10
VI = 2.5 V or 0.5 V
VO = 2 5 V or 0.5 V
2.5
05
7
9
12
SN54BCT245
MIN TYP†
MAX
–1.2
2.5
2.4
2.4
2
3.4
3.3
3.3
3.2
2
0.3
0.38
0.5
0.35
0.55
0.42
1
0.1
70
20
– 0.65
–1.2
–150
– 225
90
57
15
– 60
–100
57
36
10
7
9
12
0.55
1
0.1
70
20
– 0.65
–1.2
–150
– 225
90
57
15
mA
µA
mA
mA
mA
mA
mA
pF
pF
0.5
V
3.1
2.5
2.4
2.4
3.4
3.3
3.3
V
SN74BCT245
MIN TYP†
MAX
–1.2
UNIT
V
A port
VOL
B port
A or B port
II
IIH‡
IIL‡
IOS§
ICCL
ICCH
ICCZ
Ci
Ci
io
Control input
A or B port
Control input
A or B port
Control input
A port
B port
A to B
A to B
Control input
A to B
B to A
VCC = 4 5 V
4.5
VCC = 4 5 V
4.5
VCC = 5 5 V
5.5 V,
VCC = 5 5 V
5.5 V,
VCC = 5 5 V
5.5 V,
VCC = 5 5 V
5.5 V,
VCC = 5.5 V
VCC = 5.5 V
VCC = 5.5 V
VCC = 5 V,
VCC = 5 V
V,
† All typical values are at VCC = 5 V, TA = 25°C.
‡ For I/O ports, the parameters IIH and IIL include the off-state output current.
§ Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
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3
SN54BCT245, SN74BCT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS013H – SEPTEMBER 1998 – REVISED MAY 2002
switching characteristics (see Figure 1)
VCC = 5 V,
CL = 50 pF,
R1 = 500
Ω,
R2 = 500
Ω,
TA = 25°C
′BCT245
MIN
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
A or B
B or A
A or B
A or B
1
1.5
1.5
1.5
1.5
1.5
TYP
4.4
4.8
8
8
5.8
5.1
MAX
6
6.6
9.4
10.2
8.3
7.8
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500
Ω,
R2 = 500
Ω,
TA = MIN to MAX
†
SN54BCT245
MIN
1
1.5
1.5
1.5
1.5
1.5
MAX
7.2
7.6
11.2
11.8
9.7
9.6
SN74BCT245
MIN
1
1.5
1.5
1.5
1.5
1.5
MAX
7
7
10.9
11.6
9.3
9.1
ns
ns
ns
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
UNIT
OE
OE
† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
4
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
SN54BCT245, SN74BCT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS013H – SEPTEMBER 1998 – REVISED MAY 2002
PARAMETER MEASUREMENT INFORMATION
7 V (tPZL, tPLZ, O.C.)
Open
(all others)
S1
From Output
Under Test
CL
(see Note A)
R1
Test
Point
R1
From Output
Under Test
CL
(see Note A)
R2
RL = R1 = R2
Test
Point
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR
3-STATE AND OPEN-COLLECTOR OUTPUTS
High-Level
Pulse
(see Note B)
3V
1.5 V
tw
0V
tsu
Data Input
(see Note B)
1.5 V
th
3V
1.5 V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
Low-Level
Pulse
1.5 V
1.5 V
0V
3V
1.5 V
0V
Timing Input
(see Note B)
3V
1.5 V
3V
Input
(see Note B)
tPLH
In-Phase
Output
(see Note D)
tPHL
Out-of-Phase
Output
(see Note D)
1.5 V
3V
1.5 V
1.5 V
0V
tPHL
VOH
1.5 V
1.5 V
VOL
tPLH
VOH
1.5 V
VOL
Waveform 2
(see Notes C and D)
Waveform 1
(see Notes C and D)
Output
Control
(low-level enable)
tPZL
1.5 V
1.5 V
1.5 V
0V
tPLZ
3.5 V
VOL
tPHZ
tPZH
VOH
1.5 V
0.3 V
0V
0.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (see Note D)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, tr = tf
≤
2.5 ns, duty cycle = 50%.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
E. When measuring propagation delay times of 3-state outputs, switch S1 is open.
Figure 1. Load Circuit and Voltage Waveforms
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•
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5
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