71M6533/H and 71M6534/H
Energy Meter IC
Simplifying System Integration
TM
DATA SHEET
November 2009
GENERAL DESCRIPTION
The 71M6533 and 71M6534 are Teridian’s 3
rd
-generation poly-
phase metering SOCs with a 10MHz 8051-compatible MPU
core, low-power RTC, FLASH and LCD driver. Teridian’s pa-
tented Single Converter Technology® with a 22-bit delta-sigma
ADC, seven analog inputs, digital temperature compensation,
precision voltage reference and a 32-bit computation engine
(CE) supports a wide range of metering applications with very
few external components.
The 71M6533 and 71M6534 add several new features to Teri-
dian’s flagship 71M6513 poly-phase meters including an SPI in-
terface, advanced power management with <1 µA sleep cur-
rent, 4 KB shared RAM and 128 KB (71M6533/H, 71M6534) or
256 KB (71M6534H) Flash which may be programmed in the
field with new code and/or data during meter operation. Higher
processing and sampling rates and larger memory offer a po-
werful metering platform for commercial and industrial meters
with up to class 0.2 accuracy.
A complete array of ICE and development tools, programming
libraries and reference designs enable rapid development and
certification of meters that meet all ANSI & IEC electricity meter-
ing standards worldwide.
FEATURES
•
Accuracy < 0.1% over 2000:1 range
•
Exceeds IEC62053 / ANSI C12.20 standards
•
Seven sensor inputs with neutral current
measurement
•
Low-jitter Wh and VARh plus two additional
pulse test outputs (4 total, 10 kHz maximum)
with pulse count
•
Four-quadrant metering
•
Phase sequencing
•
Line frequency count for RTC
•
Digital temperature compensation
•
Independent 32-bit compute engine
•
46-64 Hz line frequency range with same
calibration. Phase compensation (± 7°)
•
Three battery back-up modes with wake-up
on timer or push-button:
Brownout mode (82 µA typ., 71M6533)
LCD mode (21 µA typ., DAC active)
Sleep mode (0.7 µA typ.)
•
Energy display during mains power failure
•
39 mW typical consumption @ 3.3 V, MPU
clock frequency 614 kHz
•
8-bit MPU (80515), 1 clock cycle per in-
struction, 10 MHz maximum, with integrated
ICE for debug
•
LCD driver with 4 common segment drivers:
Up to 228 (71M6533) or 300 (71M6534)
pixels
•
4 dedicated plus 35 (71M6533) or
48 (71M6534) multi-function DIO pins
•
RTC for TOU functions with clock-rate adjust
register
•
Hardware watchdog timer, power fail monitor
2
•
I C/Microwire EEPROM Interface
•
High-speed slave SPI interface to data RAM
•
Two UARTs for IR and AMR, IR driver with
modulation
•
Flash memory with security and in-system
program update:
128 KB (71M6533/H, 71M6534)
256 KB (71M6534H)
•
4 KB RAM
•
Industrial temperature range
•
100-pin (71M6533/H) or 120-pin
(71M6534/H) lead free LQFP package
LIVE
NEUT
LIVE
LIVE
CT / COIL
LOAD
POWER SUPPLY
NEUTRAL
CONVERTER
IA
VA
IB
VB
IC
VC
ID
VREF
SERIAL PORTS
V3P3A V3P3SYS GNDA GNDD
PWR MODE
CONTROL
TERIDIAN
71M6533
71M6534
TEMP
SENSOR
WAKE-up
REGULATOR
VBAT
V2P5
LCD DRIVER
DIO ,
PULSE
BATTERY
RAM
COMPUTE
ENGINE
FLASH
COM0..3
SEG
SEG/ DIO
8888.8888
AMR
TX
RX
IR
MOD
RX
TX
DIO
PULSES
,
DIO
I
2
C or µWire
EEPROM
COMPARATOR
MPU
RTC
TIMERS
ICE
OSC/ PLL
XIN
POWER
FAULT
V1
V2*
* 71M6534 only
32 kHz
XOUT
9/24/2008
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© 2007-2009 TERIDIAN Semiconductor Corporation
1
71M6533/71M6534 Data Sheet
FDS_6533_6534_004
Table of Contents
1
Hardware Description ......................................................................................................................... 9
1.1
Hardware Overview .................................................................................................................... 9
1.2
Analog Front End (AFE) .......................................................................................................... 10
1.2.1 Signal Input Pins ............................................................................................................ 10
1.2.2 Input Multiplexer ............................................................................................................ 10
1.2.3 A/D Converter (ADC) ..................................................................................................... 11
1.2.4 FIR Filter ........................................................................................................................ 11
1.2.5 Voltage References ....................................................................................................... 12
1.2.6 Temperature Sensor ...................................................................................................... 13
1.2.7 Battery Monitor............................................................................................................... 13
1.2.8 AFE Functional Description ........................................................................................... 13
1.2.9 Digital Computation Engine (CE) ................................................................................... 14
1.2.10 Meter Equations ............................................................................................................. 15
1.2.11 Real-Time Monitor ......................................................................................................... 15
1.2.12 Pulse Generators ........................................................................................................... 16
1.2.13 Data RAM (XRAM) ........................................................................................................ 16
1.2.14 CE Functional Overview ................................................................................................ 17
1.3
80515 MPU Core ....................................................................................................................... 19
1.3.1 Memory Organization and Addressing .......................................................................... 19
1.3.2 Special Function Registers (SFRs) ............................................................................... 21
1.3.3 Generic 80515 Special Function Registers ................................................................... 22
1.3.4 71M6533/71M6534-Specific Special Function Registers .............................................. 25
1.3.5 Instruction Set ................................................................................................................ 26
1.3.6 UARTs ........................................................................................................................... 26
1.3.7 Timers and Counters ..................................................................................................... 29
1.3.8 WD Timer (Software Watchdog Timer) ......................................................................... 30
1.3.9 Interrupts ........................................................................................................................ 30
1.4
On-Chip Resources ................................................................................................................. 37
1.4.1 Oscillator ........................................................................................................................ 37
1.4.2 PLL and Internal Clocks................................................................................................. 37
1.4.3 Real-Time Clock (RTC) ................................................................................................. 38
1.4.4 Temperature Sensor ...................................................................................................... 39
1.4.5 Physical Memory............................................................................................................ 39
1.4.6 UART and Optical Interface ........................................................................................... 41
1.4.7 Digital I/O ....................................................................................................................... 42
1.4.8 LCD Drivers ................................................................................................................... 45
1.4.9 Battery Monitor............................................................................................................... 46
1.4.10 EEPROM Interface ........................................................................................................ 46
1.4.11 SPI Slave Port................................................................................................................ 49
1.4.12 Hardware Watchdog Timer ............................................................................................ 51
1.4.13 Test Ports (TMUXOUT Pin) ........................................................................................... 51
1.4.14 V2 Comparator (71M6534/6534H only) ......................................................................... 52
2
Functional Description ..................................................................................................................... 53
2.1
Theory of Operation................................................................................................................. 53
2.2
System Timing Summary ........................................................................................................ 54
2.3
Battery Modes .......................................................................................................................... 55
2.3.1 BROWNOUT Mode ....................................................................................................... 56
2.3.2 LCD Mode ...................................................................................................................... 57
2
© 2007-2009 TERIDIAN Semiconductor Corporation
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71M6533/71M6534 Data Sheet
2.4
2.5
2.6
2.7
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
3.13
3.14
3.15
3.16
3.17
3.18
4
4.1
4.2
4.3
2.3.3 SLEEP Mode ................................................................................................................. 57
Fault and Reset Behavior ........................................................................................................ 62
2.4.1 Reset Mode.................................................................................................................... 62
2.4.2 Power Fault Circuit ........................................................................................................ 62
Wake Up Behavior ................................................................................................................... 63
2.5.1 Wake on PB ................................................................................................................... 63
2.5.2 Wake on Timer............................................................................................................... 63
Data Flow .................................................................................................................................. 64
CE/MPU Communication ......................................................................................................... 64
Application Information.................................................................................................................... 65
Connection of Sensors (CT, Resistive Shunt) ...................................................................... 65
Distinction between 71M6533/71M6534 and 71M6533H/71M6534H Parts .......................... 65
Connecting 5 V Devices .......................................................................................................... 66
Temperature Measurement ..................................................................................................... 66
Temperature Compensation ................................................................................................... 66
3.5.1 Temperature Coefficients .............................................................................................. 66
3.5.2 Temperature Compensation for VREF .......................................................................... 67
3.5.3 System Temperature Compensation ............................................................................. 67
3.5.4 Temperature Compensation for the RTC ...................................................................... 67
Connecting LCDs ..................................................................................................................... 67
Connecting I
2
C EEPROMs ....................................................................................................... 68
Connecting Three-Wire EEPROMs......................................................................................... 69
UART0 (TX/RX) ......................................................................................................................... 69
Optical Interface (UART1) ....................................................................................................... 70
Connecting the V1 Pin ............................................................................................................. 70
Connecting the Reset Pin ....................................................................................................... 71
Connecting the Emulator Port Pins ....................................................................................... 71
Connecting a Battery ............................................................................................................... 72
Flash Programming ................................................................................................................. 72
MPU Firmware Library ............................................................................................................. 73
Crystal Oscillator ..................................................................................................................... 73
Meter Calibration...................................................................................................................... 73
Firmware Interface ............................................................................................................................ 74
I/O RAM Map –Functional Order ............................................................................................. 74
I/O RAM Description – Alphabetical Order ............................................................................ 78
CE Interface Description ......................................................................................................... 91
4.3.1 CE Program ................................................................................................................... 91
4.3.2 CE Data Format ............................................................................................................. 91
4.3.3 Constants ....................................................................................................................... 91
4.3.4 Environment ................................................................................................................... 92
4.3.5 CE Calculations ............................................................................................................. 92
4.3.6 CE Front End Data (Raw Data) ..................................................................................... 92
4.3.7 CE Status and Control ................................................................................................... 93
4.3.8 CE Transfer Variables ................................................................................................... 95
4.3.9 Other Measurement and Control Parameters ............................................................... 97
4.3.10 CE Calibration Parameters ............................................................................................ 99
4.3.11 CE Flow Diagrams ......................................................................................................... 99
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© 2007-2009 TERIDIAN Semiconductor Corporation
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71M6533/71M6534 Data Sheet
FDS_6533_6534_004
5
Specifications .................................................................................................................................. 102
5.1
Absolute Maximum Ratings .................................................................................................. 102
5.2
Recommended External Components ................................................................................. 103
5.3
Recommended Operating Conditions ................................................................................. 103
5.4
Performance Specifications ................................................................................................. 104
5.4.1 Input Logic Levels ........................................................................................................ 104
5.4.2 Output Logic Levels ..................................................................................................... 104
5.4.3 Power-Fault Comparator ............................................................................................. 104
5.4.4 V2 Comparator (71M6534 only) .................................................................................. 104
5.4.5 Battery Monitor............................................................................................................. 105
5.4.6 Supply Current ............................................................................................................. 105
5.4.7 V3P3D Switch .............................................................................................................. 105
5.4.8 2.5 V Voltage Regulator............................................................................................... 106
5.4.9 Low-Power Voltage Regulator ..................................................................................... 106
5.4.10 Crystal Oscillator .......................................................................................................... 106
5.4.11 Optical Interface ........................................................................................................... 106
5.4.12 LCD DAC ..................................................................................................................... 106
5.4.13 LCD Drivers ................................................................................................................. 107
5.4.14 Temperature Sensor .................................................................................................... 107
5.4.15 VREF and VBIAS ......................................................................................................... 108
5.4.16 ADC Converter, V3P3A Referenced ........................................................................... 109
5.5
Timing Specifications ............................................................................................................ 110
5.5.1 Flash Memory .............................................................................................................. 110
5.5.2 EEPROM Interface ...................................................................................................... 110
5.5.3 RESET ......................................................................................................................... 110
5.5.4 RTC.............................................................................................................................. 110
5.5.5 SPI Slave Port (MISSION Mode) ................................................................................. 111
5.6
Typical Performance Data ..................................................................................................... 112
5.6.1 Accuracy over Current ................................................................................................. 112
5.6.2 Accuracy over Temperature ........................................................................................ 113
5.7
Package Outline Drawings .................................................................................................... 113
5.7.1 71M6533 (100 Pin LQFP) ............................................................................................ 113
5.7.2 71M6534/6534H (120 Pin LQFP) ................................................................................ 114
5.8
Pinout ...................................................................................................................................... 115
5.8.1 71M6533/71M6533H Pinout (100 Pin LQFP) .............................................................. 115
5.8.2 71M6534/71M6534H Pinout (120 Pin LQFP) .............................................................. 116
5.9
Pin Descriptions..................................................................................................................... 117
5.9.1 Power and Ground Pins............................................................................................... 117
5.9.2 Analog Pins .................................................................................................................. 117
5.9.3 Digital Pins ................................................................................................................... 118
5.9.4 I/O Equivalent Circuits ................................................................................................. 120
6
Ordering Information ...................................................................................................................... 121
7
Related Information ........................................................................................................................ 121
8
Contact Information ........................................................................................................................ 121
Appendix A: Acronyms .......................................................................................................................... 122
Appendix B: Revision History ............................................................................................................... 123
4
© 2007-2009 TERIDIAN Semiconductor Corporation
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71M6533/71M6534 Data Sheet
Figures
Figure 1: IC Functional Block Diagram ......................................................................................................... 8
Figure 2: General Topology of a Chopped Amplifier .................................................................................. 12
Figure 3: CROSS Signal with CHOP_E = 00 .............................................................................................. 13
Figure 4: AFE Block Diagram ..................................................................................................................... 14
Figure 5: Samples from Multiplexer Cycle .................................................................................................. 17
Figure 6: Accumulation Interval .................................................................................................................. 17
Figure 7: Interrupt Structure ........................................................................................................................ 36
Figure 8: Optical Interface ........................................................................................................................... 42
Figure 9: Connecting an External Load to DIO Pins ................................................................................... 45
Figure 10: 3-wire Interface. Write Command, HiZ=0. ................................................................................ 48
Figure 11: 3-wire Interface. Write Command, HiZ=1 ................................................................................. 48
Figure 12: 3-wire Interface. Read Command. ............................................................................................ 48
Figure 13: 3-Wire Interface. Write Command when CNT=0 ...................................................................... 49
Figure 14: 3-wire Interface. Write Command when HiZ=1 and WFR=1. ................................................... 49
Figure 15: SPI Slave Port: Typical Read and Write operations .................................................................. 50
Figure 16: Functions defined by V1 ............................................................................................................ 51
Figure 17: Voltage, Current, Momentary and Accumulated Energy ........................................................... 53
Figure 18: Timing Relationship between ADC MUX and Compute Engine ................................................ 54
Figure 19: RTM Output Format ................................................................................................................... 54
Figure 20: Operation Modes State Diagram ............................................................................................... 55
Figure 21: Functional Blocks in BROWNOUT Mode .................................................................................. 58
Figure 22: Functional Blocks in LCD Mode................................................................................................. 59
Figure 23: Functional Blocks in SLEEP Mode ............................................................................................ 60
Figure 24: Transition from BROWNOUT to MISSION Mode when System Power Returns ...................... 61
Figure 25: Power-Up Timing with V3P3SYS and VBAT tied together ........................................................ 61
Figure 26: Power-Up Timing with VBAT only.............................................................................................. 62
Figure 27: Wake Up Timing ........................................................................................................................ 63
Figure 28: MPU/CE Data Flow .................................................................................................................... 64
Figure 29: MPU/CE Communication ........................................................................................................... 64
Figure 30: Resistive Voltage Divider ........................................................................................................... 65
Figure 31: CT with Single Ended (Left) and Differential Input (Right) Connection ..................................... 65
Figure 32: Resistive Shunt (Left), Rogowski Sensor (Right) ...................................................................... 65
Figure 33: Connecting LCDs ....................................................................................................................... 68
Figure 34: I
2
C EEPROM Connection .......................................................................................................... 68
Figure 35: Three-Wire EEPROM Connection ............................................................................................. 69
Figure 36: Connections for UART0 ............................................................................................................. 69
Figure 37: Connection for Optical Components .......................................................................................... 70
Figure 38: Voltage Divider for V1 ................................................................................................................ 71
Figure 39: External Components for the RESET Pin: Push-Button (Left), Production Circuit (Right) ........ 71
Figure 40: External Components for the Emulator Interface ...................................................................... 72
Figure 41: Connecting a Battery ................................................................................................................. 72
Figure 42: CE Data Flow: Multiplexer and ADC........................................................................................ 100
Figure 43: CE Data Flow: Scaling, Gain Control, Intermediate Variables ................................................ 100
Figure 44: CE Data Flow: Squaring and Summation Stages.................................................................... 101
Figure 45: SPI Slave Port (MISSION Mode) Timing ................................................................................. 111
Figure 46: Wh Accuracy (0.1 A - 200 A, 240 V, Room Temperature) at Various Frequencies (Differential
Mode, CTs) ........................................................................................................................................ 112
Figure 47: Typical Wh Accuracy (0.02 A - 200 A, 240 V, Room Temperature), Various Load Angles
(Differential Mode, CTs) ..................................................................................................................... 112
Figure 48: 71M6533/6533H 100-pin LQFP Package Outline ................................................................... 113
Figure 49: 71M6534/6534H 120-pin LQFP Package Outline ................................................................... 114
Figure 50: Pinout for 71M6533/71M6533H LQFP-100 Package .............................................................. 115
Figure 51: Pinout for 71M6534/71M6534H LQFP-120 Package .............................................................. 116
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© 2007-2009 TERIDIAN Semiconductor Corporation
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