SM8721AB
3-PLL Multi-Output Clock Generator
OVERVIEW
The SM8721AB is a clock generator IC with 3 built-in PLLs. It can simultaneously generate and output 3
clocks with different frequency derived from a single master clock. The generated output clock frequency can
be switched using control pins and one clock can be turned ON/OFF (CLK2). The master clock can be selected
from a low-cost 14.31818MHz or small 28.636363MHz crystal. The device is available in compact 20-pin
QFN packages, making it ideal for portable digital still cameras and other applications which require multiple
clocks.
FEATURES
I
I
I
PINOUT
(Top view)
VDD1
VDD1
VSS1
CLK2ON
CLK1
15 14 13 12 11
I
I
I
I
3.0 to 3.6V supply voltage
Crystal oscillator circuit built-in
14.318182/28.636363MHz master clock
(internal PLL reference clock)
Generated clocks
• 14.318182/17.734450MHz (REF_CLK)
• 71.877274/90.314686/96.016044
/114.54546MHz (CLK1)
• 48.008022/96.016044MHz (CLK2)
Low jitter output
• 30ps typ. (1-sigma)
• 180ps typ. (peak-to-peak)
Output load
• 15pF
20-pin QFN package (Pb free)
CLK2
VSS2
VDD2
REF_CLK
TEST2
16
17
18
19
20
1 2 3 4 5
10
9
8
7
6
FS1
FS2
FS3
XTAL_SEL
TEST1
APPLICATIONS
I
PACKAGE DIMENSIONS
(Unit: mm)
Weight: 0.037g
4.20 ± 0.20
Digital still cameras
ORDERING INFORMATION
Device
SM8721AB
Package
4.20 ± 0.20
4.00 ± 0.10
4.00 ± 0.10
15
16
11
10
20-pin QFN
20
1
5
0.50
VDD3
VDD3
VSS3
XTI
XTO
6
0.60 ± 0.10
+ 0.03
0.02
−
0.02
0.05
0.22 ± 0.05
0.05
M
SEIKO NPC CORPORATION —1
1.00max
0.22
SM8721AB
BLOCK DIAGRAM
Reference
Divider 1
XTI
Oscillator
XTO
(PLL1)
Phase
Detector 1
Charge
Pump 1
LPF 1
VCO 1
CLK1
Loop
Divider 1
CLK2ON
Reference
Divider 2
Phase
Detector 2
Charge
Pump 2
LPF 2
VCO 2
CLK2
(PLL2)
FS1
FS2
FS3
XTAL_SEL
TEST1
TEST2
(PLL3)
Control
Logic
Loop
Divider 2
Reference
Divider 3
Phase
Detector 3
Charge
Pump 3
LPF 3
VCO 3
REF_CLK
Loop
Divider 3
PIN DESCRIPTION
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
VDD3
VDD3
VSS3
XTI
XTO
TEST1
XTAL_SEL
FS3
FS2
FS1
CLK1
CLK2ON
VSS1
VDD1
VDD1
CLK2
VSS2
VDD2
REF_CLK
TEST2
I/O
–
–
–
I
O
I
I
I
I
I
O
I
–
–
–
O
–
–
O
I
Analog supply voltage 3
Analog supply voltage 3
Analog supply ground 3
Crystal oscillator element connection pin (14.318182/28.636363MHz)
Crystal oscillator element connection pin
Test pin 1. Built-in pull-down resistance (leave open circuit or connect to VSS)
Crystal oscillator element selection pin. Built-in pull-up resistance
(HIGH = 28.636MHz, LOW = 14.318MHz)
CLK1, CLK2 output select 3. Built-in pull-up resistance
CLK1, CLK2 output select 2. Built-in pull-up resistance
REF_CLK output select 1. Built-in pull-up resistance
Clock output (71/90/96/114MHz switchable output)
CLK2 output enable. Built-in pull-up resistance (HIGH = enable, LOW = disable)
Digital supply ground 1
Digital supply voltage 1
Digital supply voltage 1
Clock output (48/96MHz switchable output)
Digital supply ground 2
Digital supply voltage 2
Clock output (14.318/17.734MHz switchable output)
Test pin 2. Built-in pull-down resistance (leave open circuit or connect to VSS)
Description
SEIKO NPC CORPORATION —2
SM8721AB
ABSOLUTE MAXIMUM RATINGS
V
DD
= (V
DD1
, V
DD2
, V
DD3
), V
SS
= (V
SS1
, V
SS2
, V
SS3
) unless otherwise noted.
Parameter
Supply voltage range
Supply voltage deviation
Input voltage range
Output voltage range
Power dissipation
*1
Storage temperature range
Symbol
V
DD1
, V
DD2
, V
DD3
V
DD1
−
V
DD2
, V
DD1
−
V
DD3
,
V
DD2
−
V
DD3
V
IN
V
OUT
P
D
T
STG
Rating
−0.3
to 6.5
±0.1
−0.3
to V
DD
+ 0.3
−0.3
to V
DD
+ 0.3
215
−55
to 125
Unit
V
V
V
V
mW
°C
*1. The power dissipation rating is for a surface-mounted device operating at 85°C.
RECOMMENDED OPERATING CONDITIONS
V
SS
= (V
SS1
, V
SS2
, V
SS3
) = 0V, unless otherwise noted.
Rating
Parameter
Supply voltage
*1
Output load capacitance
Master clock frequency
Operating temperature
Symbol
V
DD1
, V
DD2
,
V
DD3
C
L
f
XTAL1
f
XTAL2
T
OPR
All outputs excluding XTO
XTAL_SEL = LOW
XTAL_SEL = HIGH
Conditions
min
3.0
–
–
–
−40
typ
–
–
14.318182
28.636363
–
max
3.6
15
–
–
+85
V
pF
MHz
MHz
°C
Unit
*1. The supply voltages are with reference to V
SS
= 0V.
It is recommended that the voltages applied to pins VDD1, VDD2, VDD3 be supplied from a single source.
If various voltage sources are used on pins VDD1, VDD2, VDD3, the voltage supplies should be applied simultaneously. If the timing of applying
voltage supplies varies, the device may be damaged.
SEIKO NPC CORPORATION —3
SM8721AB
ELECTRICAL CHARACTERISTICS
DC Characteristics
V
DD
= (V
DD1
, V
DD2
, V
DD3
) = 3.3 ± 0.3V, V
SS
= (V
SS1
, V
SS2
, V
SS3
) = 0V, Ta =
−40
to +85°C unless otherwise
noted.
Rating
Parameter
Symbol
Pins
Conditions
min
Current consumption
I
DD
V
IH
V
IL
I
IH1
I
IL1
Input current
I
IH2
I
IL2
I
IH3
I
IL3
Output voltage
V
OH
V
OL
CLK1, CLK2,
REF_CLK
XTI
VDD
XTAL_SEL, FS1,
FS2, FS3, CLK2ON,
TEST1, TEST2
*1,*2
XTAL_SEL, FS1,
FS2, FS3, CLK2ON
*1
TEST1, TEST2
*2
V
DD
= 3.3V, Ta = 25°C, all
outputs operating without load
V
DD
= 3.3V
V
IN
= V
DD
V
IN
= 0V
V
IN
= V
DD
V
IN
= 0V
V
IN
= V
DD
V
IN
= 0V
I
OH
=
−2mA
I
OL
= 2mA
–
0.8V
DD
–
–
−100
–
−1
–
–40
V
DD
−
0.4
–
typ
40
–
–
–
–
–
–
–
–
–
–
max
50
–
0.2V
DD
1
–
100
–
40
–
–
0.4
mA
V
V
µA
µA
µA
µA
µA
µA
V
V
Unit
Input voltage
*1. XTAL_SEL, FS1, FS2, FS3, CLK2ON pins have Schmitt-trigger inputs with internal pull-up resistance.
*2. TEST1, TEST2 pins have Schmitt-trigger inputs with internal pull-down resistance.
SEIKO NPC CORPORATION —4
SM8721AB
AC Characteristics
V
DD
= (V
DD1
, V
DD2
, V
DD3
) = 3.3 ± 0.3V, V
SS
= (V
SS1
, V
SS2
, V
SS3
) = 0V, Ta =
−40
to +85°C unless otherwise
noted.
Rating
Parameter
Output clock rise time
*1
Output clock fall time
*1
Symbol
Pins
CLK1, CLK2,
REF_CLK
CLK1, CLK2,
REF_CLK
CLK1, CLK2,
REF_CLK
CLK1, CLK2,
REF_CLK
CLK1, CLK2,
REF_CLK
CLK1
CLK1, CLK2,
REF_CLK
Conditions
min
t
r
t
f
t
jitter
(1-sigma)
t
jitter
(peak-peak)
Dt1
Output clock duty cycle
*1, *3
Dt2
Power-up time
*3,*4,*5
t
P
C
L
= 15pF, V
OL
= 0.2V
DD
to
V
OH
= 0.8V
DD
transition
C
L
= 15pF, V
OH
= 0.8V
DD
to
V
OL
= 0.2V
DD
transition
Ta = 25°C, C
L
= 15pF,
V
O
= 0.5V
DD
Ta = 25°C, C
L
= 15pF,
V
O
= 0.5V
DD
Ta = 25°C, C
L
= 15pF,
V
O
= 0.5V
DD
Ta = 25°C, C
L
= 15pF,
V
O
= 0.5V
DD
, 114.54546MHz
–
–
–
–
45
40
–
typ
2.0
2.0
30
180
50
50
1
max
–
–
–
–
55
60
5
ns
ns
ps
ps
%
%
ms
Unit
Output clock jitter
*2,*3
*1. Measured using the circuit shown in figure 1 on the NPC standard evaluation board.
*2. Measured using the circuit shown in figure 2 on the NPC standard evaluation board.
*3. The crystal oscillator element coefficients for characteristics measurements are described below (HP4195 measurement equipment).
f = 14.318182MHz crystal: R = 12.16Ω, L = 10.34mH, Ca = 11.95fF, Cb = 4.03pF
f = 28.636363MHz crystal: R = 12.50Ω, L = 5.89mH, Ca = 5.25fF, Cb = 1.65pF
Cb
L
Ca
R
*4. The power-up time is the time from when the supply reaches 3.0V after the supply is turned ON until each output clock reaches its designated
frequency to within ±0.1%.
*5. Measured using the NPC standard evaluation board.
14.318182/
28.636363MHz
14.318182/
28.636363MHz
DUT
Active Probe
(HP1152A)
Oscilloscope
(Infinium
HP54845A)
Frequency &
Time Interval
Analyzer
(HP5371A)
DUT
Active Probe
(HP1152A)
DUT:Device under test
Passive Probe
(HP10435A)
Oscilloscope
(Infinium
HP54845A)
Jitter
Measurement
System
(ASA, M1)
DUT:Device under test
Figure 1. Measurement circuit 1
Figure 2. Measurement circuit 2
SEIKO NPC CORPORATION —5
stm32/stm8
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