CMOS Static RAM
16K (2K x 8-Bit)
Features
Description
IDT6116SA
IDT6116LA
◆
◆
◆
◆
◆
◆
◆
◆
◆
High-speed access and chip select times
– Military: 20/25/35/45/55/70/90/120/150ns (max.)
– Industrial: 20/25ns (max.)
– Commercial: 15/20/25ns (max.)
Low-power consumption
Battery backup operation
– 2V data retention voltage (LA version only)
Produced with advanced CMOS high-performance
technology
CMOS process virtually eliminates alpha particle soft-error
rates
Input and output directly TTL-compatible
Static operation: no clocks or refresh required
Available in ceramic 24-pin DIP, ceramic and plastic 24-pin Thin
Dip and 24-pin SOIC
Military product compliant to MIL-STD-833, Class B
The IDT6116SA/LA is a 16,384-bit high-speed static RAM organized
as 2K x 8. It is fabricated using high-performance, high-reliability CMOS
technology.
Access times as fast as 15ns are available. The circuit also offers a
reduced power standby mode. When
CS
goes HIGH, the circuit will
automatically go to, and remain in, a standby power mode, as long as
CS
remains HIGH. This capability provides significant system level power and
cooling savings. The low-power (LA) version also offers a battery backup
data retention capability where the circuit typically consumes only 1µW to
4µW operating off a 2V battery.
All inputs and outputs of the IDT6116SA/LA are TTL-compatible. Fully
static asynchronous circuitry is used, requiring no clocks or refreshing for
operation.
The IDT6116SA/LA is packaged in 24-pin 300mil plastic DIP, 24-pin
600mil and 300mil ceramic DIP, or 24-lead gull-wing SOIC providing high
board-level packing densities.
Military grade product is manufactured in compliance to MIL-STD-883,
Class B, making it ideally suited to military temperature applications
demanding the highest level of performance and reliability.
Functional Block Diagram
A
0
V
CC
ADDRESS
DECODER
A
10
128 X 128
MEMORY
ARRAY
GND
I/O
0
INPUT
DATA
CIRCUIT
I/O
7
I/O CONTROL
,
CS
OE
WE
CONTROL
CIRCUIT
3089 drw 01
FEBRUARY 2013
1
©2013 Integrated Device Technology, Inc.
DSC-3089/08
IDT6116SA/LA
CMOS Static RAM 2K (16K x 8-Bit)
Military, Commercial, and Industrial Temperature Ranges
Pin Configurations
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
I/O
0
I/O
1
I/O
2
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
A
8
A
9
WE
OE
A
10
CS
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
3089 drw 02
Capacitance
(T
A
= +25°C, f = 1.0 MH
Z
)
Symbol
C
IN
C
I/O
Parameter
(1)
Input Capacitance
I/O Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
8
8
Unit
pF
pF
3089 tbl 03
P24-2
P24-1
D24-2
D24-1
SO24-2
SO24-4
NOTE:
1. This parameter is determined by device characterization, but is not production
tested.
,
Absolute Maximum Ratings
(1)
Symbol
V
TERM
(2)
Rating
Terminal Voltage
with Respect
to GND
Operating
Temperature
Temperature
Under Bias
Storage Temperature
Power Dissipation
DC Output Current
Com'l.
-0.5 to +7.0
Mil.
-0.5 to +7.0
Unit
V
DIP/SOIC
Top View
Pin Description
Name
A
0
- A
10
I/O
0
- I/O
7
CS
WE
OE
V
CC
GND
Description
Address Inputs
Data Input/Output
Chip Select
Write Enable
Output Enable
Power
Ground
3089 tbl 01
T
A
T
BIAS
T
STG
P
T
I
OUT
0 to +70
-55 to +125
-55 to +125
1.0
50
-55 to +125
-65 to +135
-65 to +150
1.0
50
o
C
C
C
o
o
W
mA
3089 tbl 04
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect
reliability.
2. V
TERM
must not exceed V
CC
+0.5V.
Truth Table
(1)
Mode
Standby
Read
Read
Write
CS
H
L
L
L
OE
X
L
H
X
WE
X
H
H
L
I/O
High-Z
DATA
OUT
High-Z
DATA
IN
3089 tbl 02
NOTE:
1. H = V
IH
, L = V
IL
, X = Don't Care.
2
IDT6116SA/LA
CMOS Static RAM 2K (16K x 8-Bit)
Military, Commercial, and Industrial Temperature Ranges
Recommended Operating
Temperature and Supply Voltage
Grade
Military
Industrial
Commercial
Ambient
Temperature
-55 C to +125 C
O
O
Recommended DC
Operating Conditions
Symbol
V
CC
GND
V
IH
V
IL
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Min.
4.5
0
2.2
-0.5
(1)
Typ.
5.0
0
3.5
____
GND
0V
0V
0V
Vcc
5.0V ± 10%
5.0V ± 10%
5.0V ± 10%
3089 tbl 05
Max.
5.5
(2)
0
V
CC
+0.5
0.8
Unit
V
V
V
V
3089 tbl 06
-40
O
C to +85
O
C
0
O
C to +70
O
C
NOTES:
1. V
IL
(min.) = –3.0V for pulse width less than 20ns, once per cycle.
2. V
IN
must not exceed V
CC
+0.5V.
DC Electrical Characteristics
(V
CC
= 5.0V ± 10%)
Symbol
|I
LI
|
|I
LO
|
V
OL
V
OH
IDT6116SA
Parameter
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
Test Conditions
V
CC
= Max.,
V
IN =
GND to V
CC
V
CC
= Max.,
CS
= V
IH
,
V
OUT
= GND to V
CC
I
OL
= 8mA, V
CC
= Min.
I
OH
= -4mA, V
CC
= Min.
MIL.
COM'L & IND
MIL.
COM'L & IND
Min.
____
____
____
____
____
IDT6116LA
Min.
____
____
____
____
____
Max.
10
5
10
5
0.4
____
Max.
5
2
5
2
0.4
____
Unit
µA
µA
V
V
3089 tbl 07
2.4
2.4
DC Electrical Characteristics
(1)
(V
CC
= 5.0V ± 10%, V
LC
= 0.2V, V
HC
= V
CC
- 0.2V)
6116SA15
123Symbol
I
CC1
Parameter
Operating Power Supply Current
CS
< V
IL
, Outputs Open
V
CC
= Max., f
=
0
Dynamic Operating Current
CS
< V
IL
, Outputs Open
V
CC
= Max., f = f
MAX
(2)
Standby Power Supply Current
(TTL Level)
CS
> V
IH
, Outputs Open
V
CC
= Max., f = f
MAX
(2)
Full Standby Power Supply Current
(CMOS Level)
CS
> V
HC
, V
CC
= Max.,
V
IN
< V
LC
or V
IN
> V
HC
, f = 0
Power
SA
LA
SA
LA
SA
LA
SA
LA
Com'l
Only
105
_____
6116SA20
6116LA20
Com'l
& Ind
105
95
130
120
40
35
2
0.1
Mil
130
120
150
140
50
45
10
0.9
6116SA25
6116LA25
Com'l
& Ind
100
95
120
110
40
35
2
0.1
Mil
90
85
135
125
45
40
10
0.9
3089 tbl 08
Unit
mA
I
CC2
150
_____
mA
I
SB
40
_____
mA
I
SB1
2
_____
mA
NOTES:
1. All values are maximum guaranteed values.
2. f
MAX
= 1/t
RC
, only address inputs are cycling at f
MAX,
f = 0 means address inputs are not changing.
6.42
3
IDT6116SA/LA
CMOS Static RAM 2K (16K x 8-Bit)
Military, Commercial, and Industrial Temperature Ranges
DC Electrical Characteristics
(1)
(continued)
(V
CC
= 5.0V ± 10%, V
LC
= 0.2V, V
HC
= V
CC
- 0.2V)
6116SA35
6116LA35
Symbol
I
CC1
Parameter
Op e rating Po we r Sup p ly
Curre nt,
CS
< V
IL
,
Outp uts Op e n
V
CC
= Max., f
=
0
Dynamic Op e rating
Curre nt,
CS
< V
IL
,
Outp uts Op e n
V
CC
= Max., f = f
MAX
(2)
Stand b y Po we r Sup p ly
Curre nt (TTL Le ve l)
CS
> V
IH
, Outp uts Op e n
V
CC
= Max., f = f
MAX
(2)
Full Stand b y Po we r
Sup p ly Curre nt (CMOS
Le ve l),
CS
> V
HC
,
V
CC
= Max., V
IN
< V
LC
o r V
IN
> V
HC
, f = 0
Power
SA
LA
SA
LA
SA
LA
SA
LA
Mil Only
90
85
115
105
35
30
10
0.9
6116SA45
6116LA45
Mil Only
90
85
100
95
25
20
10
0.9
6116SA55
6116LA55
Mil Only
90
85
100
90
25
20
10
0.9
6116SA70
6116LA70
Mil Only
90
85
100
90
25
20
10
0.9
6116SA90
6116LA90
Mil Only
90
85
100
85
25
25
10
0.9
6116SA120
6116LA120
Mil Only
90
85
100
85
25
15
10
0.9
6116SA150
6116LA150
Mil Only
90
85
90
85
25
15
10
0.9
3089 tb l 09
Unit
mA
I
CC2
mA
I
SB
mA
I
SB1
mA
NOTES:
1. All values are maximum guaranteed values.
2. f
MAX
= 1/t
RC
, only address inputs are toggling at f
MAX
, f = 0 means address inputs are not changing.
Data Retention Characteristics Over All Temperature Ranges
(LA Version Only) (V
LC
= 0.2V, V
HC
= V
CC
– 0.2V)
Typ.
(1)
V
CC
@
Symbol
V
DR
I
CCDR
t
CDR
(3)
t
R
(3)
Parameter
V
CC
for Data Retention
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery Time
Input Leakage Current
Test Condition
____
Max.
V
CC
@
3.0V
____
Min.
2.0
2.0V
____
2.0V
____
3.0V
____
Unit
V
µA
ns
ns
µA
3089 tbl 10
MIL.
COM'L.
CS
> V
HC
V
IN
> V
HC
or < V
LC
____
____
0.5
0.5
0
____
1.5
1.5
____
200
20
____
300
30
____
____
t
RC
(2)
____
____
____
____
I
I
LI
I
____
____
2
2
NOTES:
1. T
A
= + 25°C
2. t
RC
= Read Cycle Time.
3. This parameter is guaranteed by device characterization, but is not production tested.
4
IDT6116SA/LA
CMOS Static RAM 2K (16K x 8-Bit)
Military, Commercial, and Industrial Temperature Ranges
Low V
CC
Data Retention Waveform
DATA RETENTION MODE
V
CC
t
CDR
CS
V
DR
V
IH
V
IH
3089 drw 03
4.5V
V
DR
≥
2V
4.5V
t
R
,
AC Test Conditions
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
GND to 3.0V
5ns
1.5V
1.5V
See Figures 1 and 2
3089 tbl 11
5V
5V
480Ω
DATA
OUT
255Ω
30pF*
480Ω
DATA
OUT
255Ω
5pF*
,
3089 drw 04
,
3089 drw 05
Figure 1. AC Test Load
*Including scope and jig.
Figure 2. AC Test Load
(for t
OLZ
, t
CLZ
, t
OHZ
, t
WHZ
, t
CHZ
& t
OW
)
6.42
5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
