BT169D-L
Thyristor, logic level
Rev. 01 — 12 November 2007
Product data sheet
1. Product profile
1.1 General description
Passivated sensitive gate thyristor in a SOT54 plastic package.
1.2 Features
I
Designed to be interfaced directly to microcontrollers, logic integrated circuits and
other low power gate trigger circuits
1.3 Applications
I
General purpose switching and phase control
1.4 Quick reference data
I
V
DRM
≤
400 V
I
V
RRM
≤
400 V
I
I
TSM
≤
8 A
I
I
T(RMS)
≤
0.8 A
I
I
T(AV)
≤
0.5 A
I
I
GT
≤
50
µA
2. Pinning information
Table 1.
Pin
1
2
3
Pinning
Description
anode (A)
gate (G)
cathode (K)
A
G
sym037
Simplified outline
Symbol
K
321
SOT54 (TO-92)
NXP Semiconductors
BT169D-L
Thyristor, logic level
3. Ordering information
Table 2.
Ordering information
Package
Name
BT169D-L
TO-92
Description
plastic single-ended leaded (through hole) package; 3 leads
Version
SOT54
Type number
4. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DRM
V
RRM
I
T(AV)
I
T(RMS)
I
TSM
Parameter
repetitive peak off-state voltage
repetitive peak reverse voltage
average on-state current
RMS on-state current
non-repetitive peak on-state
current
half sine wave; T
lead
≤
83
°C;
see
Figure 1
all conduction angles; see
Figure 4
and
5
half sine wave; T
j
= 25
°C
prior to
surge; see
Figure 2
and
3
t = 10 ms
t = 8.3 ms
I
2
t
dI
T
/dt
I
GM
V
GM
V
RGM
P
GM
P
G(AV)
T
stg
T
j
[1]
Conditions
[1]
[1]
Min
-
-
-
-
Max
400
400
0.5
0.8
Unit
V
V
A
A
-
-
-
-
-
-
-
-
8
9
0.32
50
1
5
5
2
0.1
+150
125
A
A
A
2
s
A/µs
A
V
V
W
W
°C
°C
I
2
t for fusing
rate of rise of on-state current
peak gate current
peak gate voltage
peak reverse gate voltage
peak gate power
average gate power
storage temperature
junction temperature
t = 10 ms
I
TM
= 2 A; I
G
= 10 mA;
dI
G
/dt = 100 mA/µs
over any 20 ms period
-
−40
-
Although not recommended, off-state voltages up to 800 V may be applied without damage, but the triac may switch to the on-state. The
rate of rise of current should not exceed 15 A/µs.
BT169D-L_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 12 November 2007
2 of 12
NXP Semiconductors
BT169D-L
Thyristor, logic level
0.8
P
tot
(W)
0.6
2.2
2.8
0.4
4
a=
1.57
1.9
001aab446
77
T
lead(max)
(°C)
89
101
conduction
angle
(degrees)
30
60
90
120
180
form
factor
a
4
2.8
2.2
1.9
1.57
0.5
I
T(AV)
(A)
113
α
0.2
0
0
0.1
0.2
0.3
0.4
125
0.6
Form factor a = I
T(RMS)
/ I
T(AV)
Fig 1. Total power dissipation as a function of average on-state current; maximum values
10
I
TSM
(A)
8
001aab499
6
4
I
T
I
TSM
2
t
t
p
T
j
initial = 25
°C
max
0
1
10
10
2
number of cycles
10
3
f = 50 Hz
Fig 2. Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum
values
BT169D-L_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 12 November 2007
3 of 12
NXP Semiconductors
BT169D-L
Thyristor, logic level
10
3
I
TSM
(A)
10
2
I
T
001aab497
I
TSM
t
t
p
T
j
initial = 25
°C
max
10
1
10
−5
10
−4
10
−3
t
p
(s)
10
−2
t
p
≤
10 ms
Fig 3. Non-repetitive peak on-state current as a function of pulse width for sinusoidal currents; maximum values
001aab449
2
I
T(RMS)
(A)
1.5
1
I
T(RMS)
(A)
0.8
001aab450
(1)
0.6
1
0.4
0.5
0.2
0
10
−2
10
−1
1
10
surge duration (s)
0
−50
0
50
100
150
T
lead
(°C)
f = 50 Hz; T
lead
≤
83
°C
(1) T
lead
= 83
°C
Fig 4. RMS on-state current as a function of surge
duration for sinusoidal currents
Fig 5. RMS on-state current as a function of lead
temperature; maximum values
BT169D-L_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 12 November 2007
4 of 12
NXP Semiconductors
BT169D-L
Thyristor, logic level
5. Thermal characteristics
Table 4.
Symbol
R
th(j-lead)
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from junction to
lead
thermal resistance from junction to
ambient
Conditions
see
Figure 6
Printed-circuit board mounted;
lead length = 4 mm
Min
-
-
Typ
-
150
Max
60
-
Unit
K/W
K/W
10
2
Z
th(j-lead)
(K/W)
10
001aab451
1
P
δ
=
t
p
T
10
−1
t
p
T
t
10
−2
10
−5
10
−4
10
−3
10
−2
10
−1
1
t
p
(s)
10
Fig 6. Transient thermal impedance from junction to lead as a function of pulse width
BT169D-L_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 12 November 2007
5 of 12
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
