BF908; BF908R
Dual-gate MOS-FETs
Rev. 03 — 14 November 2007
Product data sheet
IMPORTANT NOTICE
Dear customer,
As from October 1st, 2006 Philips Semiconductors has a new trade name
- NXP Semiconductors, which will be used in future data sheets together with new contact
details.
In data sheets where the previous Philips references remain, please use the new links as
shown below.
http://www.philips.semiconductors.com use http://www.nxp.com
http://www.semiconductors.philips.com use http://www.nxp.com (Internet)
sales.addresses@www.semiconductors.philips.com use salesaddresses@nxp.com
(email)
The copyright notice at the bottom of each page (or elsewhere in the document,
depending on the version)
- © Koninklijke Philips Electronics N.V. (year). All rights reserved -
is replaced with:
- © NXP B.V. (year). All rights reserved. -
If you have any questions related to the data sheet, please contact our nearest sales
office via e-mail or phone (details via salesaddresses@nxp.com). Thank you for your
cooperation and understanding,
NXP Semiconductors
NXP
Semiconductors
Product specification
Dual-gate MOS-FETs
FEATURES
•
High forward transfer admittance
•
Short channel transistor with high forward transfer
admittance to input capacitance ratio
•
Low noise gain controlled amplifier up to 1 GHz.
APPLICATIONS
•
VHF and UHF applications with 12 V supply voltage,
such as television tuners and professional
communications equipment.
DESCRIPTION
Fig.1
Depletion type field-effect transistor in a plastic
microminiature SOT143 or SOT143R package. The
transistors are protected against excessive input voltage
surges by integrated back-to-back diodes between gates
and source.
CAUTION
The device is supplied in an antistatic package. The
gate-source input must be protected against static
discharge during transport or handling.
handbook, halfpage
handbook, halfpage
BF908; BF908R
4
3
g2
g
1
d
1
Top view
2
s,b
MAM039
BF908 marking code:
%M1.
Simplified outline (SOT143) and
symbol; BF908.
d
4
g2
g1
3
PINNING
PIN
1
2
3
4
SYMBOL
s, b
d
g
2
g
1
source
drain
gate 2
gate 1
DESCRIPTION
Top view
2
1
s,b
MAM040
BF908R marking code:
%M2.
Fig.2
Simplified outline (SOT143R) and
symbol; BF908R.
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
T
j
y
fs
C
ig1-s
C
rs
F
drain current
total power dissipation
operating junction temperature
forward transfer admittance
input capacitance at gate 1
reverse transfer capacitance
noise figure
f = 1 MHz
f = 800 MHz
PARAMETER
drain-source voltage
CONDITIONS
−
−
−
−
36
2.4
20
−
MIN.
−
−
−
−
43
3.1
30
1.5
TYP.
MAX.
12
40
200
150
50
4
45
2.5
UNIT
V
mA
mW
°C
mS
pF
pF
dB
Rev. 03 - 14 November 2007
2 of 9
NXP
Semiconductors
Product specification
Dual-gate MOS-FETs
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
V
DS
I
D
±I
G1
±I
G2
P
tot
PARAMETER
drain-source voltage
drain current
gate 1 current
gate 2 current
total power dissipation
BF908
BF908R
T
stg
T
j
Note
1. Device mounted on a printed-circuit board.
storage temperature
operating junction temperature
see Fig.3; note 1
up to T
amb
= 50
°C
up to T
amb
= 40
°C
−
−
−65
−
CONDITIONS
−
−
−
−
BF908; BF908R
MIN.
MAX.
12
40
10
10
200
200
+150
150
V
UNIT
mA
mA
mA
mW
mW
°C
°C
handbook, halfpage
250
MRC275
P
tot
(mW)
200
BF908
150
BF908R
100
50
0
0
50
100
150
200
o
Tamb ( C)
Fig.3 Power derating curves.
Rev. 03 - 14 November 2007
3 of 9
NXP
Semiconductors
Product specification
Dual-gate MOS-FETs
THERMAL CHARACTERISTICS
SYMBOL
R
th j-a
BF908
BF908R
Note
1. Device mounted on a printed-circuit board.
STATIC CHARACTERISTICS
T
j
= 25
°C;
unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
V
G2-S
= V
DS
= 0; I
G1-S
= 10 mA
V
G1-S
= V
DS
= 0; I
G2-S
= 10 mA
PARAMETER
thermal resistance from junction to ambient
CONDITIONS
note 1
BF908; BF908R
VALUE
500
550
UNIT
K/W
K/W
MIN.
8
8
TYP.
−
−
−
−
15
−
−
MAX.
20
20
2
1.5
27
50
50
UNIT
V
V
V
V
mA
nA
nA
±V
(BR)G1-SS
gate 1-source breakdown voltage
±V
(BR)G2-SS
gate 2-source breakdown voltage
−V
(P)G1-S
−V
(P)G2-S
I
DSS
±I
G1-SS
±I
G2-SS
gate 1-source cut-off voltage
gate 2-source cut-off voltage
drain-source current
gate 1 cut-off current
gate 2 cut-off current
V
G2-S
= 4 V; V
DS
= 8 V; I
D
= 20
µA −
V
G1-S
= 4 V; V
DS
= 8 V; I
D
= 20
µA −
V
G2-S
= 4 V; V
DS
= 8 V; V
G1-S
= 0
V
G2-S
= V
DS
= 0; V
G1-S
= 5 V
V
G1-S
= V
DS
= 0; V
G2-S
= 5 V
3
−
−
DYNAMIC CHARACTERISTICS
Common source; T
amb
= 25
°C;
V
DS
= 8 V; V
G2-S
= 4 V; I
D
= 15 mA; unless otherwise specified.
SYMBOL
y
fs
C
ig1-s
C
ig2-s
C
os
C
rs
F
PARAMETER
forward transfer admittance
input capacitance at gate 1
input capacitance at gate 2
output capacitance
reverse transfer capacitance
noise figure
f = 1 MHz
f = 1 MHz
f = 1 MHz
f = 1 MHz
f = 200 MHz; G
S
= 2 mS; B
S
= B
Sopt
f = 800 MHz; G
S
= G
Sopt
; B
S
= B
Sopt
CONDITIONS
pulsed; T
j
= 25
°C;
f = 1 MHz
MIN.
36
2.4
1.2
1.2
20
−
−
TYP.
43
3.1
1.8
1.7
30
0.6
1.5
MAX.
50
4
2.5
2.2
45
1.2
2.5
UNIT
mS
pF
pF
pF
fF
dB
dB
Rev. 03 - 14 November 2007
4 of 9
NXP
Semiconductors
Product specification
Dual-gate MOS-FETs
BF908; BF908R
handbook, halfpage
40
MRC281
MRC282
ID
(mA)
30
VG2-S = 4 V
3V
2V
handbook, halfpage
30
VG1-S = 0.3 V
ID
(mA)
0.2 V
20
20
1.5 V
1V
0.1 V
0V
0.5 V
10
10
−0.1
V
−0.2
V
0V
0
−0.6
−0.4
−0.2
0
−0.3
V
0
4
8
12
VDS (V)
16
0
0.2
0.4
VG1-S (V)
0.6
V
DS
= 8 V; T
j
= 25
°C.
V
G2-S
= 4 V; T
j
= 25
°C.
Fig.4 Transfer characteristics; typical values.
Fig.5 Output characteristics; typical values.
50
Yfs
(mS)
40
MRC280
4V
3V
2V
1.5 V
60
Yfs
(mS)
MRC276
40
30
1V
20
20
0.5 V
10
VG2-S = 0 V
0
0
0
5
10
15
20
25
I D (mA)
40
0
40
80
120
160
T (
o
C)
j
V
DS
= 8 V; T
j
= 25
°C.
V
DS
= 8 V; V
G2-S
= 4 V; I
D
= 15 mA.
Fig.6
Forward transfer admittance as a function
of drain current; typical values.
Fig.7
Forward transfer admittance as a function
of junction temperature; typical values.
Rev. 03 - 14 November 2007
5 of 9
聊聊、笑笑、闹闹
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
