PRELIMINARY DATASHEET
LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO
Description
The ICS3727XP combines the functions of a VCXO
(Voltage Controlled Crystal Oscillator) and PLL
(Phase-Locked Loop) frequency doubler onto a single
chip. It is designed primarily for data and clock recovery
applications within end products such as set-top box
receivers.
The ICS3727XP exhibits a moderate VCXO gain of 200
ppm/V typical, when used with a high quality external
pullable quartz crystal.
The frequency of the on-chip VCXO is adjusted by an
external control voltage input into pin VIN. Because
VIN is a high impedance input, it can be driven directly
from an PWM RC integrator circuit. Frequency output
increases with VIN voltage input. The usable range of
VIN is 0 to 3.3 V.
ICS3727XP
Features
•
ICS3727XP offers 24 to 36 MHz output frequency
range (output frequency = 2x crystal frequency) and
improved power supply noise rejection
•
Uses an inexpensive 12 to 18 MHz external crystal
•
Ideal for DV CODEC applications using 27 MHz
external pullable crystal with extended pull range to
generate locked 27 MHz clock transport video clock
•
On-chip VCXO with guaranteed pull range of ±200
ppm minimum
•
VCXO input tuning voltage 0 to 3.3 V
•
Packaged in 8-pin SOIC (150 mil wide)
Block Diagram
VIN
12-18 MHz
Pullable
Crystal
X1
X2
Voltage
Controlled
Crystal
Oscillator
PLL
Frequency
Doubler
24-36 MHz
(2x Crystal Frequency)
IDT™ / ICS™
LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO
1
ICS3727XP
REV A 102004
ICS3727XP
LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO
VCXO
Pin Assignment
X1
VDD
VI N
GND
1
2
3
4
8
7
6
5
X2
GND
NC
CLK
I CS3 7 2 7 XP
8 - p i n ( 1 5 0 mi l ) SOI C
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
Pin
Name
XI
VDD
VIN
GND
CLK
NC
GND
X2
Pin
Type
Input
Power
Input
Power
Output
—
Power
Input
Pin Description
Crystal connection — Connect to the external pullable crystal.
Connect to +3.3 V (0.01uf decoupling capacitor recommended).
Voltage input to VCXO — 0 to 3.3 V analog input which controls the
oscillation frequency of the VCXO.
Connect to ground.
Clock output.
No internal connection (may connect to ground or VDD).
Connect to ground.
Crystal connection — Connect to the external pullable crystal.
IDT™ / ICS™
LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO
2
ICS3727XP
REV A 102004
ICS3727XP
LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO
VCXO
External Component Selection
The ICS3727XP requires a minimum number of
external components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between VDD (pin 2) and GND (pin 4), as close to these
pins as possible. For optimum device performance, the
decoupling capacitor should be mounted on the
component side of the PCB. Avoid the use of vias in the
decoupling circuit.
The external crystal must be connected as close to the
chip as possible and should be on the same side of the
PCB as the ICS3727XP. There should be no via’s
between the crystal pins and the X1 and X2 device pins.
There should be no signal traces underneath or close to
the crystal.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors on
the PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture
and frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
To determine the need for and value of the crystal
adjustment capacitors, you will need a PC board of your
final layout, a frequency counter capable of about 1 ppm
resolution and accuracy, two power supplies, and some
samples of the crystals which you plan to use in
production, along with measured initial accuracy for
each crystal at the specified crystal load capacitance,
CL.
To determine the value of the crystal capacitors:
1. Connect VDD of the ICS3727XP to 3.3 V. Connect
pin 3 of the ICS3727XP to the second power supply.
Adjust the voltage on pin 3 to 0V. Measure and record
the frequency of the CLK output.
2. Adjust the voltage on pin 3 to 3.3 V. Measure and
record the frequency of the same output.
To calculate the centering error:
Series Termination Resistor
When the PCB trace between the clock output (CLK, pin
5) and the load is over 1 inch, series termination should
be used. To series terminate a 50Ω trace (a commonly
used trace impedance) place a 33Ω resistor in series
with the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20Ω
.
Quartz Crystal
The ICS3727XP VCXO function consists of the external
crystal and the integrated VCXO oscillator circuit. To
assure the best system performance (frequency pull
range) and reliability, a crystal device with the
recommended parameters (shown below) must be
used, and the layout guidelines discussed in the
following section shown must be followed.
The frequency of oscillation of a quartz crystal is
determined by its “cut” and by the load capacitors
connected to it. The ICS3727XP incorporates on-chip
variable load capacitors that “pull” (change) the
frequency of the crystal. The crystal specified for use
with the ICS3727XP is designed to have zero frequency
error when the total of on-chip + stray capacitance is 14
pF.
Recommended Crystal Parameters:
Initial Accuracy at 25
°
C
Temperature Stability
Aging
Load Capacitance
Shunt Capacitance, C0
C0/C1 Ratio
Equivalent Series Resistance
±20 ppm
±30 ppm
±20 ppm
14 pf
7 pF Max
250 Max
35Ω Max
6
(
f
3.0V
–
f
t arg et
)
+
(
f
0V
–
f
t arg et
)
Error = 10 x ------------------------------------------------------------------------------
–
error
xtal
f
t arg et
Where:
f
target
= nominal crystal frequency
error
xtal
=actual initial accuracy (in ppm) of the crystal
being measured
IDT™ / ICS™
LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO
3
ICS3727XP
REV A 102004
ICS3727XP
LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO
VCXO
If the centering error is less than ±25 ppm, no
adjustment is needed. If the centering error is more than
25ppm negative, the PC board has excessive stray
capacitance and a new PCB layout should be
considered to reduce stray capacitance. (Alternately,
the crystal may be re-specified to a higher load
capacitance. Contact IDT for details.) If the centering
error is more than 25 ppm positive, add identical fixed
centering capacitors from each crystal pin to ground.
The value for each of these caps (in pF) is given by:
External Capacitor = 2 x (centering error)/(trim
sensitivity)
Trim sensitivity is a parameter which can be supplied by
your crystal vendor. If you do not know the value,
assume it is 30 ppm/pF. After any changes, repeat the
measurement to verify that the remaining error is
acceptably low (typically less than ±25 ppm).
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS3727XP. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Soldering Temperature
7V
Rating
-0.5 V to VDD+0.5 V
0 to +70° C
-65 to +150° C
260° C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Reference crystal parameters
Min.
0
+3.15
Typ.
Max.
+70
+3.45
Units
°
C
V
Refer to page 3
IDT™ / ICS™
LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO
4
ICS3727XP
REV A 102004
ICS3727XP
LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO
VCXO
DC Electrical Characteristics
VDD=3.3 V ±5%
, Ambient temperature 0 to +70° C, unless stated otherwise
Parameter
Operating Voltage
Output High Voltage
Output Low Voltage
Output High Voltage (CMOS
Level)
Operating Supply Current
Short Circuit Current
VIN, VCXO Control Voltage
Symbol
VDD
V
OH
V
OL
V
OH
IDD
I
OS
V
IA
Conditions
I
OH
= -12 mA
I
OL
= 12 mA
I
OH
= -4 mA
Output = 27 MHz,
no load
Min.
3.15
2.4
Typ.
Max.
3.45
0.4
Units
V
V
V
V
VDD-0.4
10
±50
0
3.3
mA
mA
V
AC Electrical Characteristics
VDD = 3.3 V ±5%,
Ambient Temperature 0 to +70° C, unless stated otherwise
Parameter
Output Frequency
Crystal Pullability
VCXO Gain
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
Maximum Output Jitter,
short term
Symbol
F
O
F
P
t
OR
t
OF
t
D
t
J
Conditions
VCXO Crystal frequency =
1/2 Output
0V< VIN < 3.3 V, Note 1
VIN = VDD/2 + 1 V, Note 1
0.8 to 2.0 V, C
L
=15 pF
2.0 to 0.8 V, C
L
=15 pF
Measured at 1.4 V, C
L
=15 pF
C
L
=15 pF
Min.
24
+ 200
Typ.
Max. Units
36
MHz
ppm
200
1.5
1.5
40
50
100
60
ppm/V
ns
ns
%
ps
Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3.
IDT™ / ICS™
LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO
5
ICS3727XP
REV A 102004
PCB设计
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