电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

SN74ACQ573SJ

产品描述Bus Driver, AC Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, EIAJ TYPE2, PLASTIC, SSOP-20
产品类别逻辑   
文件大小212KB,共10页
制造商Fairchild
官网地址http://www.fairchildsemi.com/
下载文档 详细参数 全文预览

SN74ACQ573SJ概述

Bus Driver, AC Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, EIAJ TYPE2, PLASTIC, SSOP-20

SN74ACQ573SJ规格参数

参数名称属性值
厂商名称Fairchild
零件包装代码SSOP
包装说明SOP,
针数20
Reach Compliance Codeunknown
系列AC
JESD-30 代码R-PDSO-G20
长度12.6 mm
逻辑集成电路类型BUS DRIVER
位数8
功能数量1
端口数量2
端子数量20
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码SOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE
传播延迟(tpd)8.5 ns
认证状态Not Qualified
座面最大高度2.1 mm
最大供电电压 (Vsup)6 V
最小供电电压 (Vsup)2 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子形式GULL WING
端子节距1.27 mm
端子位置DUAL
宽度5.3 mm
Base Number Matches1

文档预览

下载PDF文档
74ACQ573
74ACTQ573 Quiet Series
Octal Latch with 3-STATE Outputs
May 1998
74ACQ573
74ACTQ573
Quiet Series
Octal Latch with 3-STATE Outputs
General Description
The ACQ/ACTQ573 is a high-speed octal latch with buffered
common Latch Enable (LE) and buffered common Output
Enable (OE) inputs. The ACQ/ACTQ573 is functionally iden-
tical to the ACQ/ACTQ373 but with inputs and outputs on op-
posite sides of the package. The ACQ/ACTQ utilizes Fair-
child’s Quiet Series
technology to guarantee quiet output
switching and improved dynamic threshold performance.
FACT Quiet Series
features GTO
output control and un-
dershoot corrector in addition to a split ground bus for supe-
rior performance.
Features
n
I
CC
and I
OZ
reduced by 50%
n
Guaranteed simultaneous switching noise level and
dynamic threshold performance
n
Guaranteed pin-to-pin skew AC performance
n
Improved latch-up immunity
n
Inputs and outputs on opposite sides of package allow
easy interface with microprocessors
n
Outputs source/sink 24 mA
n
Faster prop delays than standard AC/ACT573
n
4 kV minimum ESD immunity
Ordering Code:
Order Number
74ACQ573SC
74ACQ573SJ
74ACQ573PC
74ACTQ573SC
74ACTQ573SJ
74ACTQ573PC
74ACTQ573QSC
Package Number
M20B
M20D
V20A
M20B
M20D
V20A
MQA20
Package Description
20-Lead (0.300" Wide) Molded Small Outline Package
20-Lead (0.300" Wide) Molded Shrink Small Outline Package EIAJ
20-Lead Molded Dual-in-Line Package
20-Lead (0.300" Wide) Molded Small Outline Package
20-Lead (0.300" Wide) Molded Shrink Small Outline Package EIAJ
20-Lead Molded Dual-in-Line Package
20-Lead (0.150" Wide) Molded Shrink Small Outline Package
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
Pin Assignment for DIP
QSOP and SOIC
DS010633-1
IEEE/IEC
DS010633-3
Pin Descriptions
Pin Names
D
0
–D
7
LE
DS010633-2
Description
Data Inputs
Latch Enable Input
3-STATE Output Enable Input
3-STATE Latch Outputs
OE
O
0
–O
7
FACT
, Quiet Series
, FACT Quiet Series
, and GTO
are trademarks of Fairchild Semiconductor Corporation
© 1998 Fairchild Semiconductor Corporation
DS010633
www.fairchildsemi.com

技术资料推荐更多

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 496  461  1851  568  184  26  12  52  58  56 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved