IDT74FCT163244A/C
3.3V CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT
BUFFER/LINE DRIVER
IDT74FCT163244A/C
• 0.5 MICRON CMOS Technology
• Typical t
SK(o)
(Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• V
CC
= 3.3V ± 0.3V, Normal Range, or V
CC
= 2.7V to 3.6V, Extended
Range
• CMOS power levels (0.4µ W typ. static)
µ
• Rail-to-rail output swing for increased noise margin
• Low Ground Bounce (0.3V typ.)
• Inputs (except I/O) can be driven by 3.3V or 5V components
• Available in SSOP, TSSOP, and TVSOP packages
FEATURES:
DESCRIPTION:
The FCT163244 16-bit buffer/line drivers are built using advanced dual
metal CMOS technology. These high-speed, low-power devices offer bus/
backplane interface capability with improved packing density. These
devices have a flow-through organization for simplifying board layout. The
three-state controls operate these devices in a Quad-Nibble, Dual-Byte or
single 16-bit word mode. All inputs are designed with hysteresis for
improved noise margin.
The inputs of the FCT163244 can be driven from either 3.3V or 5V
devices. This feature allows the use of these devices as translators in a
mixed 3.3V/5V supply system. Thus, the FCT163244 can be used as
buffers to connect 5V components to a 3.3V bus.
FUNCTIONAL BLOCK DIAGRAM
1
1
OE
1
A
1
1
A
2
1
A
3
1
A
4
47
46
44
43
2
3
5
1
Y
3
6
1
Y
4
3
A
4
1
Y
1
1
Y
2
3
OE
25
13
14
16
3
Y
3
17
3
Y
4
36
3
A
1
3
A
2
3
A
3
35
33
32
3
Y
1
3
Y
2
2
OE
2
A
1
2
A
2
2
A
3
2
A
4
48
4
OE
41
40
38
37
8
9
11
12
2
Y
1
2
Y
2
2
Y
3
2
Y
4
4
A
1
4
A
2
4
A
3
4
A
4
24
19
20
22
23
30
29
27
26
4
Y
1
4
Y
2
4
Y
3
4
Y
4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 2002 Integrated Device Technology, Inc.
APRIL 2002
DSC-2532/9
IDT74FCT163244A/C
3.3V CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Description
Max
–0.5 to +4.6
–0.5 to 7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +60
Unit
V
V
V
°C
mA
V
TERM
(2)
Terminal Voltage with Respect to GND
V
TERM
(3)
Terminal Voltage with Respect to GND
V
TERM
(4)
Terminal Voltage with Respect to GND
T
STG
I
OUT
Storage Temperature
DC Output Current
1
OE
1
Y
1
1
Y
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
2
OE
1
A
1
1
A
2
GND
1
Y
3
1
Y
4
GND
1
A
3
1
A
4
V
CC
2
Y
1
2
Y
2
V
CC
2
A
1
2
A
2
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. Vcc terminals.
3. Input terminals.
4. Outputs and I/O terminals.
GND
2
Y
3
2
Y
4
3
Y
1
3
Y
2
GND
2
A
3
2
A
4
3
A
1
3
A
2
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
3.5
3.5
Max.
6
8
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
GND
3
Y
3
3
Y
4
GND
3
A
3
3
A
4
PIN DESCRIPTION
Pin Names
xOE
xAx
xYx
Data Inputs
3-State Outputs
Description
3-State Output Enable Inputs (Active LOW)
V
CC
4
Y
1
4
Y
2
V
CC
4
A
1
4
A
2
GND
4
Y
3
4
Y
4
4
OE
GND
4
A
3
4
A
4
3
OE
FUNCTION TABLE
(1)
Inputs
xOE
L
xAx
L
H
X
Outputs
xYx
L
H
Z
SSOP/ TSSOP/ TVSOP
TOP VIEW
L
H
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High-Impedance
2
IDT74FCT163244A/C
3.3V CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 2.7V to 3.6V
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
ODH
I
ODL
V
OH
Parameter
Input HIGH Level (Input pins)
Input HIGH Level (I/O pins)
Input LOW Level (Input and I/O pins) Guaranteed Logic LOW Level
Input HIGH Current (Input pins)
Input HIGH Current (I/O pins)
Input LOW Current (Input pins)
Input LOW Current (I/O pins)
High Impedance Output Current
(3-State Output pins)
Clamp Diode Voltage
Output HIGH Current
Output LOW Current
Output HIGH Voltage
V
CC
= Min., I
IN
= –18mA
V
CC
= 3.3V, V
IN
= V
IH
or V
IL,
V
O
= 1.5V
(3)
V
CC
= 3.3V, V
IN
= V
IH
or V
IL,
V
O
= 1.5V
(3)
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= 3V
V
IN
= V
IH
or V
IL
V
OL
Output LOW Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= 3V
V
IN
= V
IH
or V
IL
I
OS
V
H
I
CCL
I
CCH
I
CCZ
Short Circuit Current
(4)
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Max.
V
IN
= GND or V
CC
V
CC
= Max., V
O
= GND
(3)
—
–60
—
—
–135
150
0.1
–240
—
10
mA
mV
µA
I
OL
= 0.1mA
I
OL
= 16mA
I
OL
= 24mA
I
OL
= 24mA
—
—
—
—
—
0.2
0.3
0.3
0.2
0.4
0.55
0.5
V
I
OH
= –0.1mA
I
OH
= –3mA
I
OH
= –8mA
V
CC
= Max.
V
CC
= Max.
V
I
= 5.5V
V
I
= V
CC
V
I
= GND
V
I
= GND
V
O
= V
CC
V
O
= GND
Test Conditions
(1)
Guaranteed Logic HIGH Level
Min.
2
2
–0.5
—
—
—
—
—
—
—
–36
50
V
CC
-0.2
2.4
2.4
(5)
Typ.
(2)
—
—
—
—
—
—
—
—
—
–0.7
–60
90
—
3
3
Max.
5.5
V
CC
+0.5
0.8
±1
±1
±1
±1
±1
±1
–1.2
–110
200
—
—
—
V
V
mA
mA
µA
µA
V
Unit
V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. V
OH
= V
CC
–0.6V at rated current.
3
IDT74FCT163244A/C
3.3V CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4)
V
CC
= Max.
V
IN
= V
CC
- 0.6V
(3)
V
CC
= Max.
Outputs Open
xOE = GND
One Input Togging
50% Duty Cycle
V
CC
= Max.
Outputs Open
f
i
= 10MHz
50% Duty Cycle
xOE = GND
One Bit Toggling
V
CC
= Max.
Outputs Open
f
i
= 2.5MHz
50% Duty Cycle
xOE = GND
Sixteen BitsTogging
V
IN
= V
CC
V
IN
= GND
Test Conditions
(1)
Min.
—
—
Typ.
(2)
2
50
Max.
30
75
Unit
µA
µA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
- 0.6V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
—
0.5
0.8
mA
—
0.5
0.8
—
2
3
(5)
V
IN
= V
CC
- 0.6V
V
IN
= GND
—
2
3.3
(5)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
3. Per TTL driven input. All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
N
CP
/2 + fiNi)
I
CC
= Quiescent Current (I
CCL
, I
CCH
and I
CCZ
)
∆I
CC
= Power Supply Current for a TTL High Input
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
N
CP
= Number of Clock Inputs at f
CP
fi = Input Frequency
Ni = Number of Inputs at fi
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(1)
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SK(o)
Parameter
Propagation Delay
xAx to xYx
Output Enable Time
Output Disable Time
Output Skew
(4)
Condition
(2)
C
L
= 50pF
R
L
= 500Ω
FCT163244A
Min.
(3)
Max.
1.5
4.8
1.5
1.5
—
6.2
5.6
0.5
FCT163224C
Min.
(3)
Max.
1.5
4.1
1.5
1.5
—
5.8
5.2
0.5
Unit
ns
ns
ns
ns
NOTES:
1. Propagation Delays and Enable/Disable times are with V
CC
= 3.3V±0.3V (normal range). For V
CC
= 2.7 to 3.6V (extended range), all Propagation Delays and Enable/Disable
times should be degraded by 20%.
2. See test circuit and waveforms.
3. Minimum limits are guaranteed but not tested on Propagation Delays.
4. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4
IDT74FCT163244A/C
3.3V CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
V
CC
500
Ω
6v
Open
GND
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
Disable High
Enable High
All Other Tests
Switch
6V
GND
Open
V
IN
Pulse
Generator
R
T
D.U.T
.
V
OU
T
50pF
C
L
500
Ω
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
Test Circuits for All Outputs
DATA
INPUT
t
SU
t
H
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
t
SU
CLOCK ENABLE
ETC.
t
REM
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
1.5V
1.5V
t
H
Pulse Width
Set-up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
t
PHL
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
CONTROL
INPUT
t
PZ
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
L
DISABLE
3V
1.5V
t
PL
3V
1.5V
t
PHZ
0.3V
1.5V
0V
0V
V
OH
Z
0V
3V
0.3V
V
OL
SWITCH
6V
t
PZH
SWITCH
GND
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns.
3. if V
CC
is below 3V, input voltage swings should be adjusted not to exceed V
CC
.
5
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