PJSMF03LC Series
5-TVS/ZENER ARRAY FOR ESD AND LATCH-UP PROTECTION
This 5-TVS/Zener Array has been designed to Protect Sensitive Equipment against
ESD and to prevent Latch-Up events in CMOS circuitry, operating at 3.3V and 5V, as
well available for 12V, 15V,
and
24V Systems. This TVS array offers an integrated
solution to protect up to 5 data lines where the board space is a premium.
SPECIFICATION FEATURES
100W Power Dissipation (8/20µs Waveform)
Low Leakage Current
Very Low Clamping Voltage
IEC61000-4-2 ESD 20kV air, 15kV Contact Compliance
Operating voltage options for 3.3V, 5V, 12V, 15V,
and
24V
Industry Standard SOT363 (SC70-6L) Package
1
6
5
4
APPLICATIONS
Personal Digital Assistant (PDA)
SIM Card Port Protection (Mobile Phone)
Portable Instrumentation
Mobile Phones and Accessories
Memory Card Port Protection
1
2
3
SOT363
MAXIMUM RATINGS (Per Device)
Rating
Peak Pulse Power (8/20µs Waveform)
ESD Voltage (HBM)
Operating Temperature Range
Storage Temperature Range
Symbol
P
pp
V
ESD
TJ
T
stg
Value
100
25
-55 to +150
-55 to + 150
Units
W
kV
°C
°C
ELECTRICAL CHARACTERISTICS (Per Device)
Tj = 25°C
PJSMF03LC
Parameter
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Clamping Voltage (820µs)
Clamping Voltage (8/20µs)
Off State Junction Capacitance
Off State Junction Capacitance
Symbol
V
WRM
V
BR
I
R
V
c
V
c
Cj
Cj
I
BR
= 10 mA
V
R
= 3.3V
I pp = 5A
I pp = 9A
0 Vdc Bias f = 1MHz
Between I/O pins and pin 2
3.3 Vdc Bias f = 1MHz
Between I/O pins and pin 2
Conditions
Min
Typical
Max
3.3
Units
V
V
µA
V
V
pF
pF
4.7
5.6
250
7.5
9
160
90
9/14/2005
Page
1
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PJSMF03LC Series
ELECTRICAL CHARACTERISTICS (Per Device)
Tj = 25°C
PJSMF05LC
Parameter
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Clamping Voltage (8/20µs)
Clamping Voltage (8/20µs)
Off State Junction Capacitance
Off State Junction Capacitance
Symbol
V
WRM
V
BR
I
R
V
c
V
c
Cj
Cj
I
BR
= 1mA
V
R
= 5V
I pp = 5A
I pp = 9A
0 Vdc Bias f = 1MHz
Between I/O pins and pin 2
5 Vdc Bias f = 1MHz
Between I/O pins and pin 2
Conditions
Min
Typical
Max
5
Units
V
V
6.2
0.5
10
11
100
45
µA
V
V
pF
pF
PJSMF12LC
Parameter
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Clamping Voltage (8/20µs)
Clamping Voltage (8/20µs)
Off State Junction Capacitance
Symbol
V
WRM
V
BR
I
R
V
c
V
c
Cj
I
BR
= 1mA
V
R
= 12V
I pp = 3A
I pp = 5A
0 Vdc Bias f = 1MHz
Between I/O pins and pin 2
Conditions
Min
Typical
Max
12
Units
V
V
13.3
0.5
18
20
50
µA
V
V
pF
PJSMF15LC
Parameter
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Clamping Voltage (8/20µs)
Clamping Voltage (8/20µs)
Off State Junction Capacitance
Symbol
V
WRM
V
BR
I
R
V
c
V
c
Cj
I
BR
= 1mA
V
R
= 15V
I pp = 3A
I pp = 4A
0 Vdc Bias f = 1MHz
Between I/O pins and pin 2
Conditions
Min
Typical
Max
15
Units
V
V
16.6
0.5
23
25
40
µA
V
V
pF
9/14/2005
Page 2
www.panjit.com
PJSMF03LC Series
ELECTRICAL CHARACTERISTICS (Per Device)
Tj = 25°C
PJSMF24LC
Parameter
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Clamping Voltage (8/20µs)
Clamping Voltage (8/20µs)
Off State Junction Capacitance
Symbol
V
WRM
V
BR
I
R
V
c
V
c
Cj
I
BR
= 1mA
V
R
= 24V
I pp = 1A
I pp = 2A
0 Vdc Bias f = 1MHz
Between I/O pins and pin 2
Conditions
Min
Typical
Max
24
Units
V
V
26.7
0.5
35
45
30
µA
V
V
pF
PJSMF36LC
Parameter
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Clamping Voltage (8/20µs)
Clamping Voltage (8/20µs)
Off State Junction Capacitance
Symbol
V
WRM
V
BR
I
R
V
c
V
c
Cj
I
BR
= 1mA
V
R
= 36V
I pp = 1A
I pp = 2A
0 Vdc Bias f = 1MHz
Between I/O pins and pin 2
Conditions
Min
Typical
Max
36
Units
V
V
38
0.5
40
50
25
µA
V
V
pF
9/14/2005
Page 3
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PJSMF03LC Series
TYPICAL CHARACTERISTICS
25°C unless otherwise noted
Non-Repetitive Peak Pulse Power vs Pulse Time
1000
Peak Pulse Power - Ppp (W)
Pulse Waveform
110
100
90
80
70
60
50
40
30
20
10
0
0
100
Percent of Ipp
50% of Ipp @ 20µs
R tim 10-90% - 8µs
ise e
10
1
10
100
1000
Pulse Duration, µsec
5
10
15
20
25
30
time, µsec
Capacitance vs. Biasing Voltage @1MHz
100
90
Capacitance, pF
Typical Leakage Current vs Temperature
Clamping Voltage vs Ipp 8x20µsec Surge
0.1000
10
9
8
0.0100
7
6
5
4
0.0010
3
2
1
0
0.0001
PJSMF05LC
5V
80
70
60
50
40
30
Ipp, Amps
Current, µA
PJSMF05LC
3V
6
25
7
50
8
75
Temp,°C
9
100
10
125
11
150
0
1
2
3
4
5
Clamping Voltage, V
Bias Voltage, Vdc
9/14/2005
Page 4
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PJSMF03LC Series
LAYOUT DIMENSIONS AND SUGGESTED PAD LAYOUT
9/14/2005
Page 5
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