VERY LOW POWER 1.8V
16K/8K/4K x 16
DUAL-PORT STATIC RAM
Features
◆
◆
◆
IDT70P264/254/244L
DATASHEET
◆
◆
◆
True Dual-Ported memory cells which allow simultaneous
reads of the same memory location
High-speed access
– Industrial: 40/55ns (max.)
Low-power operation
IDT70P264/254/244L
Active: 27mW (typ.)
Standby: 3.6
µ
W (typ.)
On-chip port interrupt logic which supports level shift
output
Fully asynchronous operation from either port
◆
◆
◆
◆
◆
◆
◆
Power supply isolation functionality to aid system power
management
Separate upper-byte and lower-byte control for multiplexed
bus compatibility
Left port is selectable 3.0V, 2.5V or 1.8V
Right port is 1.8V I/O
LVTTL-compatible, single 1.8V (±100mV) power supply
Available in 81 Ball 0.5mm-pitch BGA
Industrial temperature range (-40°C to +85°C)
Green parts available, see ordering information
Functional Block Diagram
R/W
L
UB
L
R/W
R
UB
R
LB
L
CE
L
OE
L
LB
R
CE
R
OE
R
I/O
8L
-I/O
15L
I/O
0L
-I/O
7L
I/O
Control
I/O
Control
I/O
8R
-I/O
15R
I/O
0R
-I/O
7R
,
A
13L
(1)
A
0L
Address
Decoder
MEMORY
ARRAY
Address
Decoder
A
13R
(1)
A
0R
14
14
CE
L
OE
L
R/W
L
INTERRUPT
LOGIC
CE
R
OE
R
R/W
R
INT
L
NOTE:
1. A
13X
is a NC for IDT70P254. A
13X
and A
12X
are NC for IDT70P244.
INT
R
7148 drw 01
FEBRUARY 2009
1
©2008 Integrated Device Technology, Inc.
DSC-7148/2
IDT70P264/254/244L
Low Power 1.8V 16K/8K/4K x 16 Dual-Port Static RAM
Datasheet
Industrial Temperature Range
Description
The IDT70P264/254/244 is a very low power 16K/8K/4K x 16
Dual-Port Static RAM. The IDT70P264/254/244 is designed to be used
as a stand-alone 256/128/64K-bit Dual-Port SRAM.
This device provides two independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access for
reads or writes to any location in memory. An automatic power down
feature controlled by
CE
permits the on-chip circuitry of each port to enter
a very low standby power mode.
Fabricated using IDT’s CMOS high-performance technology,
these devices typically operate on only 27mW of power.
The IDT70P264/254/244 is packaged in a 81 ball 0.5mm- pitch Ball
Grid Array. The package is a 1mm thick and designed to fit in wireless
handset applications.
Pin Configurations
70P264/254/244BY
BY-81
81-Ball 0.5mm Pitch BGA
Top View
1
A
B
C
D
E
F
G
H
J
A
2R
2
A
5R
3
A
11R
4
CE
R
5
V
SS
6
I/O
14R
7
I/O
12R
8
I/O
10R
9
I/O
8R
A
B
C
D
E
F
G
H
J
A
1R
A
7R
A
9R
A
12R
(1)
A
13R
(1)
I/O
13R
I/O
11R
V
SS
I/O
7R
A
0R
A
6R
A
8R
A
10R
R/W
R
I/O
15R
V
DD
I/O
9R
I/O
6R
UB
R
A
3R
A
4R
INT
R
OE
R
I/O
5R
I/O
2R
I/O
4R
I/O
3R
V
SS
LB
L
INT
L
LB
R
V
DD
I/O
13L
I/O
15L
I/O
0R
I/O
1R
UB
L
A
4L
A
2L
A
3L
I/O
3L
I/O
5L
I/O
12L
V
DDQL
I/O
14L
A
0L
A
1L
A
11L
A
12L
(1)
OE
L
I/O
4L
I/O
9L
I/O
11L
I/O
10L
A
6L
A
8L
A
9L
A
13L
(1)
CE
L
I/O
0L
I/O
2L
V
SS
I/O
8L
A
5L
A
7L
A
10L
R/W
L
V
SS
I/O
1L
V
DDQL
I/O
6L
I/O
7L
1
2
3
4
5
6
7
8
9
7148 drw 02
NOTE:
1. A
13X
is a NC for IDT70P254. A
13X
and A
12X
are NC for IDT70P244.
6.42
2
IDT70P264/254/244L
Low Power 1.8V 16K/8K/4K x 16 Dual-Port Static RAM
Datasheet
Industrial Temperature Range
Pin Names
Left Port
CE
L
R/W
L
OE
L
A
0L
- A
13L
(1)
I/O
0L
- I/O
15L
UB
L
LB
L
INT
L
CE
R
R/W
R
OE
R
A
0R
- A
13R
(1)
I/O
0R
- I/O
15R
UB
R
LB
R
INT
R
V
DD
V
DDQL
V
SS
Right Port
Names
Chip Enable (Input)
Read/Write Enable (Input)
Output Enable (Input)
Address (Input)
Data Input/Output
Upper Byte Select (Input)
Lower Byte Select (Input)
Interrupt Flag (Output)
Power for Core + Right Port I/O
(1.8V) (Input)
Left Port I/O Supply Voltage
(1.8V, 2.5V or 3.0V) (Input)
Ground (0V) (Input)
7148 tbl 01
NOTE:
1. A
13X
is a NC for IDT70P254. A
13
X
and A
12
X
are NC for IDT70P244.
Truth Table I: Non-Contention Read/Write Control
Inputs
CE
H
X
L
L
L
L
L
L
X
R/W
X
X
L
L
L
H
H
H
X
OE
X
X
X
X
X
L
L
L
H
UB
X
H
L
H
L
L
H
L
X
LB
X
H
H
L
L
H
L
L
X
I/O
8-15
High-Z
High-Z
DATA
IN
High-Z
DATA
IN
DATA
OUT
High-Z
DATA
OUT
High-Z
Outputs
I/O
0-7
High-Z
High-Z
High-Z
DATA
IN
DATA
IN
High-Z
DATA
OUT
DATA
OUT
High-Z
Mode
Deselected: Power Down
Both Bytes Deselected
Write to Upper Byte Only
(1)
Write to Lower Byte Only
(1)
Write to Both Bytes
(1)
Read Upper Byte Only
Read Lower Byte Only
Read Both Bytes
Outputs Disabled
7148 tbl 02
NOTE:
1. A
0L
— A
13L
≠
A
0R
— A
13R
6.42
3
IDT70P264/254/244L
Low Power 1.8V 16K/8K/4K x 16 Dual-Port Static RAM
Datasheet
Industrial Temperature Range
Absolute Maximum Ratings
(1)
Symbol
V
TERM
V
TERM
V
TERM
(2)
T
BIAS
(3)
T
STG
T
JN
I
OUT
(for
V
DDQL
= 3.0V)
I
OUT
(for
V
DDQL
= 2.5V)
Rating
Supply Voltage on V
DD
with Respect to GND
Supply Voltage on V
DDQL
with Respect to GND
Terminal Voltage with
Respect to GND
Temperature Under Bias
Storage Temperature
Junction Temperature
DC Output Current
DC Output Current
Industrial
-0.5 to +2.9
-0.5 to +3.6
-0.5 to V
DD
+0.3
(4)
-55 to +125
-65 to +150
+150
20
20
Unit
V
V
V
o
C
C
C
o
o
mA
mA
7148 tbl 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect
reliability.
2. V
TERM
must not exceed V
DD
+ 0.3V for more than 25% of the cycle time or 10ns maximum, and
is limited to < 20mA for the period over V
TERM
= V
DD
+ 0.3V
.
3. Ambient Temperature under DC Bias. No AC Conditions. Chip Deselected.
4. V
DDQL
+ 0.3V for left port.
Capacitance
Symbol
C
IN
C
OUT
(TA = +25°C, f = 1.0MHz)
Parameter
Input Capacitance
Output Capacitance
Conditions
(2)
V
IN
= 3dV
V
OUT
= 3dV
Max.
9
10
Unit
pF
pF
7148
tbl 07
Maximum Operating Temperature
and Supply Voltage
(1)
Grade
Industrial
Ambient
Temperature
-40
O
C to +85
O
C
GND
0V
V
DD
1.8V
+
100mV
7148 tbl 04
NOTES:
1. This parameter is determined by device characterization but is not production
tested.
2. 3dV references the interpolated capacitance when the input and output signals
switch from 0V to 3V or from 3V to 0V.
NOTE:
1. This is the parameter T
A
. This is the "instant on" case temperature.
6.42
4
IDT70P264/254/244L
Low Power 1.8V 16K/8K/4K x 16 Dual-Port Static RAM
Datasheet
Industrial Temperature Range
Recommended DC Operating Conditions
(V
DDQL
= 3.0V±300mV)
Symbol
V
DD
V
DDQL
V
SS
V
IHL
V
ILL
V
IHR
V
ILR
Parameter
Supply Voltage
Left Port Supply Voltage
Ground
Input High Voltage (V
DDQL
= 3.0V)
Input Low Voltage (V
DDQL
= 3.0V)
Input High Voltage
Input Low Voltage
Min.
1.7
2.7
0
2.0
-0.2
1.2
-0.2
Typ.
1.8
3.0
0
___
Max.
1.9
3.3
0
V
DDQL
+ 0.2
0.7
V
DD
+ 0.2
0.4
Unit
V
V
V
V
V
V
V
7148
tbl 05
___
___
___
Recommended DC Operating Conditions
(V
DDQL
= 2.5V±100mV)
Symbol
V
DD
V
DDQL
V
SS
V
IHL
V
ILL
V
IHR
V
ILR
Parameter
Supply Voltage
Left Port Supply Voltage
Ground
Input High Voltage (V
DDQL
= 2.5V)
Input Low Voltage (V
DDQL
= 2.5V)
Input High Voltage
Input Low Voltage
Min.
1.7
2.4
0
1.7
-0.3
1.2
-0.2
Typ.
1.8
2.5
0
___
Max.
1.9
2.6
0
V
DDQL
+ 0.3
0.6
V
DD
+ 0.2
0.4
Unit
V
V
V
V
V
V
V
7148 tbl 06
___
___
___
Recommended DC Operating Conditions
(V
DDQL
= 1.8V±100mV)
Symbol
V
DD
V
DDQL
V
SS
V
IHL
V
ILL
V
IHR
V
ILR
Parameter
Supply Voltage
Left Port Supply Voltage
Ground
Input High Voltage (V
DDQL
= 1.8V)
Input Low Voltage (V
DDQL
= 1.8V)
Input High Voltage
Input Low Voltage
Min.
1.7
1.7
0
1.2
-0.2
1.2
-0.2
Typ.
1.8
1.8
0
___
Max.
1.9
1.9
0
V
DDQL
+ 0.2
0.4
V
DD
+ 0.2
0.4
Unit
V
V
V
V
V
V
V
7148 tbl 06_5
___
___
___
NOTES:
1. V
IL
> -1.5V for pulse width less than 10ns.
2. V
TERM
must not exceed V
DD
+ 0.3V.
6.42
5
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