74VHC595 8-Bit Shift Register with Output Latches
May 2007
74VHC595
8-Bit Shift Register with Output Latches
Features
■
High Speed: t
PD
=
5.4ns (Typ.) at V
CC
=
5V
■
Low power dissipation: I
CC
=
4µA (Max.) at T
A
=
25°C
■
High noise immunity: V
NIH
=
V
NIL
=
28% V
CC
(Min.)
■
Power down protection is provided on all inputs
■
Low noise: V
OLP
=
0.9V (Typ.)
■
Pin and function compatible with 74HC595
tm
General Description
The VHC595 is an advanced high-speed CMOS Shift
Register fabricated with silicon gate CMOS technology.
It achieves the high-speed operation similar to equiva-
lent Bipolar Schottky TTL while maintaining the CMOS
low power dissipation.
This device contains an 8-bit serial-in, parallel-out shift
register that feeds an 8-bit D-type storage register. The
storage register has eight 3-STATE outputs. Separate
clocks are provided for both the shift register and the
storage register. The shift register has a direct-overriding
clear, serial input, and serial output (standard) pins for
cascading. Both the shift register and storage register
use positive-edge triggered clocks. If both clocks are
connected together, the shift register state will always be
one clock pulse ahead of the storage register.
An input protection circuit insures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery
backup. This circuit prevents device destruction due to
mismatched supply and input voltages.
Ordering Information
Order
Number
74VHC595M
74VHC595SJ
74VHC595MTC
Package
Number
M16A
M16D
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number.
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
74VHC595 8-Bit Shift Register with Output Latches
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
SER
SCK
RCK
SCLR
G
Q
A
– Q
H
Q’
H
Description
Serial Data Input
Shift Register Clock Input
(Active rising edge)
Storage Register Clock Input
(Active rising edge)
Reset Input
3-STATE Output Enable Input
(Active LOW)
Parallel Data Outputs
Serial Data Output
Truth Table
Inputs
SER
X
X
X
L
H
X
RCK
X
X
X
X
X
↑
SCK
X
X
X
↑
↑
X
SCLR
X
X
L
H
H
H
G
H
L
L
L
L
L
Q
A
thru Q
H
3-STATE
Function
Q
A
thru Q
H
outputs enabled
Shift Register cleared: Q
′
H
= 0
Shift Register clocked: Q
N
=
Q
n-1
, Q
0
=
SER
=
L
Shift Register clocked: Q
N
=
Q
n-1
, Q
0
=
SER
=
H
Contents of Shift Register transferred to output latches
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
2
74VHC595 8-Bit Shift Register with Output Latches
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
T
STG
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current
DC V
CC
/ GND Current
Storage Temperature
Parameter
Rating
–0.5V to +7.0V
–0.5V to +7.0V
–0.5V to V
CC
+ 0.5V
–20mA
±20mA
±25mA
±75mA
–65°C to +150°C
260°C
Lead Temperature (Soldering, 10 seconds)
Recommended Operating Conditions
(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
IN
V
OUT
T
OPR
t
r
, t
f
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time
V
CC
=
3.3V ±0.3V
V
CC
=
5.0V ±0.5V
Parameter
Rating
2.0V to +5.5V
0V to +5.5V
0V to V
CC
–40°C to +85°C
0
∼
100ns/V
0
∼
20ns/V
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
5
嵌入式系统
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