54AC11010, 74AC11010
TRIPLE 3 INPUT POSITIVE NAND GATES
SCLS057 − MAY 1987 − REVISED APRIL 1993
•
•
•
•
•
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
EPIC
(Enhanced-Performance Implanted
CMOS) 1-µm Process
500-mA Typical Latch-Up Immunity
at 125°C
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
54AC11010 . . . J PACKAGE
74AC11010 . . . D OR N PACKAGE
(TOP VIEW)
1A
1Y
2Y
GND
GND
3Y
3C
3B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1C
2A
V
CC
V
CC
2B
2C
3A
description
These devices contain three independent 3-input
NAND gates. They perform the Boolean functions
Y = A
S
B
S
C or Y = A + B + C in positive logic.
The 54AC11010 is characterized for operation
over the full military temperature range of − 55°C
to 125°C. The 74AC11010 is characterized for
operation from −40°C to 85°C.
54AC11010 . . . FK PACKAGE
(TOP VIEW)
1C
1B
NC
1A
1Y
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
2A
V
CC
NC
V
CC
2B
2C
3A
NC
3B
3C
NC − No internal connection
C
H
X
X
L
OUTPUT
Y
L
H
H
H
Copyright
1993, Texas Instruments Incorporated
FUNCTION TABLE
(each gate)
INPUTS
A
H
L
X
X
B
H
X
L
X
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
•
2Y
GND
NC
GND
3Y
2−1
54AC11010, 74AC11010
TRIPLE 3 INPUT POSITIVE NAND GATES
SCLS057 − MAY 1987 − REVISED APRIL 1993
logic symbol
†
1A
1B
1C
2A
2B
2C
3A
3B
3C
1
16
15
14
11
10
9
8
7
6
3Y
3
2Y
&
2
1Y
logic diagram (positive logic)
1A
1B
1C
2A
2B
2C
3A
3B
3C
1
16
15
14
11
10
9
8
7
2
1Y
3
2Y
6
3Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
‡
Supply voltage range, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, V
I
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
CC
+ 0.5 V
Output voltage range, V
O
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
CC
+ 0.5 V
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
20 mA
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
50 mA
Continuous output current, I
O
(V
O
= 0 to V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
50 mA
Continuous current through V
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
100 mA
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2−2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
•
54AC11010, 74AC11010
TRIPLE 3 INPUT POSITIVE NAND GATES
SCLS057 − MAY 1987 − REVISED APRIL 1993
recommended operating conditions
54AC11010
MIN
VCC
VIH
Supply voltage
VCC = 3 V
VCC = 4.5 V
VCC = 5.5 V
VCC = 3 V
VIL
VI
VO
IOH
Low-level input voltage
Input voltage
Output voltage
VCC = 3 V
VCC = 4.5 V
VCC = 5.5 V
VCC = 3 V
IOL
∆t
/∆v
TA
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
VCC = 4.5 V
VCC = 5.5 V
0
−55
VCC = 4.5 V
VCC = 5.5 V
0
0
3
2.1
3.15
3.85
0.9
1.35
1.65
VCC
VCC
−4
−24
−24
12
24
24
10
125
0
−40
0
0
NOM
5
MAX
5.5
74AC11010
MIN
3
2.1
3.15
3.85
0.9
1.35
1.65
VCC
VCC
−4
−24
−24
12
24
24
10
85
ns/ V
°C
mA
mA
V
V
V
V
NOM
5
MAX
5.5
UNIT
V
High-level input voltage
High-level output current
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
3V
IOH = − 50
µA
IOH = − 4 mA
IOH = − 24 mA
IOH = − 50 mA†
IOH = − 75 mA†
IOL = 50
µA
IOL = 12 mA
IOL = 24 mA
IOL = 50 mA†
IOL = 75 mA†
II
ICC
Ci
VI = VCC or GND
VI = VCC or GND,
IO = 0
4.5 V
5.5 V
3V
4.5 V
5.5 V
5.5 V
5.5 V
3V
4.5 V
5.5 V
3V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
±
0.1
4
±1
80
VOL
0.1
0.1
0.1
0.36
0.36
0.36
0.1
0.1
0.1
0.5
0.5
0.5
1.65
1.65
±1
40
µA
µA
pF
VOH
TA = 25°C
MIN
TYP
MAX
2.9
4.4
5.4
2.58
3.94
4.94
54AC11010
MIN
2.9
4.4
5.4
2.4
3.7
4.7
3.85
3.85
0.1
0.1
0.1
0.44
0.44
0.44
V
MAX
74AC11010
MIN
2.9
4.4
5.4
2.48
3.8
4.8
V
MAX
UNIT
VI = VCC or GND
5V
3.5
† Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
•
2−3
54AC11010, 74AC11010
TRIPLE 3 INPUT POSITIVE NAND GATES
SCLS057 − MAY 1987 − REVISED APRIL 1993
switching characteristics over recommended operating free-air temperature range,
V
CC
= 3.3 V
±
0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
Any
TO
(OUTPUT)
Y
TA = 25°C
MIN
TYP
MAX
1.5
1.5
5.9
5.8
8.5
9
54AC11010
MIN
1.5
1.5
MAX
10
10.4
74AC11010
MIN
1.5
1.5
MAX
9.3
9.9
UNIT
ns
switching characteristics over recommended operating free-air temperature range,
V
CC
= 5 V
±
0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
Any
TO
(OUTPUT)
Y
TA = 25°C
MIN
TYP
MAX
1.5
1.5
4.4
4.6
6.2
6.4
54AC11010
MIN
1.5
1.5
MAX
7.1
7.4
74AC11010
MIN
1.5
1.5
MAX
6.7
7
UNIT
ns
operating characteristics, V
CC
= 5 V, T
A
= 25
°
C
PARAMETER
Cpd
Power dissipation capacitance per gate
TEST CONDITIONS
CL = 50 pF,
f = 1 MHz
TYP
23
UNIT
pF
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
500
Ω
Output
Input
(see Note B)
tPHL
VCC
50%
50%
0V
tPLH
VOH
50% VCC
VOL
50% VCC
LOAD CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. Input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, ZO = 50
Ω,
tr = 3 ns, tf = 3 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
2−4
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POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
•
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