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IDT7207L25JI

产品描述FIFO, 32KX9, 25ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32
产品类别存储   
文件大小209KB,共14页
制造商IDT (Integrated Device Technology)
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IDT7207L25JI概述

FIFO, 32KX9, 25ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32

IDT7207L25JI规格参数

参数名称属性值
是否无铅含铅
是否Rohs认证不符合
厂商名称IDT (Integrated Device Technology)
零件包装代码QFJ
包装说明PLASTIC, LCC-32
针数32
Reach Compliance Codenot_compliant
ECCN代码EAR99
最长访问时间25 ns
其他特性RETRANSMIT
最大时钟频率 (fCLK)28.5 MHz
周期时间35 ns
JESD-30 代码R-PQCC-J32
JESD-609代码e0
长度13.9954 mm
内存密度294912 bit
内存集成电路类型OTHER FIFO
内存宽度9
湿度敏感等级1
功能数量1
端子数量32
字数32768 words
字数代码32000
工作模式ASYNCHRONOUS
最高工作温度85 °C
最低工作温度-40 °C
组织32KX9
可输出NO
封装主体材料PLASTIC/EPOXY
封装代码QCCJ
封装等效代码LDCC32,.5X.6
封装形状RECTANGULAR
封装形式CHIP CARRIER
并行/串行PARALLEL
峰值回流温度(摄氏度)225
电源5 V
认证状态Not Qualified
座面最大高度3.556 mm
最大待机电流0.008 A
最大压摆率0.12 mA
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Tin/Lead (Sn85Pb15)
端子形式J BEND
端子节距1.27 mm
端子位置QUAD
处于峰值回流温度下的最长时间20
宽度11.4554 mm
Base Number Matches1

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CMOS ASYNCHRONOUS FIFO
2,048 x 9, 4,096 x 9
8,192 x 9, 16,384 x 9
32,768 x 9, 65,536 x 9
IDT7203
IDT7204
IDT7205
IDT7206
IDT7207
IDT7208
FEATURES:
First-In/First-Out Dual-Port memory
2,048 x 9 organization (IDT7203)
4,096 x 9 organization (IDT7204)
8,192 x 9 organization (IDT7205)
16,384 x 9 organization (IDT7206)
32,768 x 9 organization (IDT7207)
65,636 x 9 organization (IDT7208)
High-speed: 12ns access time
Low power consumption
— Active: 660mW (max.)
— Power-down: 44mW (max.)
Asynchronous and simultaneous read and write
Fully expandable in both word depth and width
Pin and functionally compatible with IDT720X family
Status Flags: Empty, Half-Full, Full
Retransmit capability
High-performance CMOS technology
Military product compliant to MIL-STD-883, Class B
Standard Military Drawing for #5962-88669 (IDT7203), 5962-89567
(IDT7203), and 5962-89568 (IDT7204) are listed on this function
Industrial temperature range (–40°C to +85°C) is available
(plastic packages only)
DESCRIPTION:
The IDT7203/7204/7205/7206/7207/7208 are dual-port memory buffers
with internal pointers that load and empty data on a first-in/first-out basis. The
device uses Full and Empty flags to prevent data overflow and underflow and
expansion logic to allow for unlimited expansion capability in both word size and
depth.
Data is toggled in and out of the device through the use of the Write (W) and
Read (R) pins.
The device's 9-bit width provides a bit for a control or parity at the user’s
option. It also features a Retransmit (RT) capability that allows the read pointer
to be reset to its initial position when
RT
is pulsed LOW. A Half-Full Flag is
available in the single device and width expansion modes.
These FIFOs are fabricated using IDT’s high-speed CMOS technology.
They are designed for applications requiring asynchronous and simultaneous
read/writes in multiprocessing, rate buffering and other applications.
Military grade product is manufactured in compliance with the latest revision
of MIL-STD-883, Class B.
FUNCTIONAL BLOCK DIAGRAM
DATA INPUTS
(D
0
-D
8
)
W
WRITE
CONTROL
RAM ARRAY
WRITE
POINTER
2,048 x 9
4,096 x 9
8,192 x 9
16,384 x 9
32,768 x 9
65,536 x 9
READ
POINTER
THREE-
STATE
BUFFERS
R
READ
CONTROL
FLAG
LOGIC
DATA OUTPUTS
(Q
0
-Q
8
)
RS
RESET
LOGIC
FL/RT
EF
FF
XI
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
EXPANSION
LOGIC
XO/HF
2661 drw01
COMMERCIAL, MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
©
2001 Integrated Device Technology, Inc.
MAY 2001
DSC-2661/12

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