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74AC11648DW

产品描述Registered Bus Transceiver, AC Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDSO28, PLASTIC, SO-28
产品类别逻辑   
文件大小122KB,共9页
制造商Rochester Electronics
官网地址https://www.rocelec.com/
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74AC11648DW概述

Registered Bus Transceiver, AC Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDSO28, PLASTIC, SO-28

74AC11648DW规格参数

参数名称属性值
厂商名称Rochester Electronics
包装说明SOP,
Reach Compliance Codeunknown
其他特性SELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED/REAL TIME DATA
系列AC
JESD-30 代码R-PDSO-G28
长度17.9 mm
逻辑集成电路类型REGISTERED BUS TRANSCEIVER
位数8
功能数量1
端口数量2
端子数量28
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性INVERTED
封装主体材料PLASTIC/EPOXY
封装代码SOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE
传播延迟(tpd)12.8 ns
座面最大高度2.65 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)3 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子形式GULL WING
端子节距1.27 mm
端子位置DUAL
宽度7.5 mm
Base Number Matches1

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74AC11648
OCTAL BUS TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS
SCAS114 – MARCH 1990 – REVISED APRIL 1993
Independent Registers for A and B Buses
Multiplexed Real-Time and Stored Data
Inverting Data Paths
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
EPIC
(Enhanced-Performance Implanted
CMOS) 1-µm Process
500-mA Typical Latch-Up Immunity
at 125°C
Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
DW OR NT PACKAGE
(TOP VIEW)
description
OE
A1
A2
A3
A4
GND
GND
GND
GND
A5
A6
A7
A8
DIR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CLKAB
SAB
B1
B2
B3
B4
V
CC
V
CC
B5
B6
B7
B8
CLKBA
SBA
The 74AC11648 consists of bus transceiver
circuits, D-type flip-flops, and control circuitry
arranged for multiplexed transmission of data
directly from the input bus or from the internal
registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock
(CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be
performed with the 74AC11648.
Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the
transceiver mode, data present at the high-impedance port may be stored in either register or in both.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The
direction control (DIR) determines which bus will receive data when OE is low. In the isolation mode (OE high),
A data may be stored in one register and/or B data may be stored in the other register.
When an output function is disabled, the input function is still enabled and may be used to store and transmit
data. Only one of the two buses, A or B, may be driven at a time.
The 74AC11648 is characterized for operation from – 40°C to 85°C.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
©
1993, Texas Instruments Incorporated
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
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