电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

1N5937P

产品描述Zener Diode,
产品类别分立半导体    二极管   
文件大小379KB,共3页
制造商Microsemi
官网地址https://www.microsemi.com
下载文档 详细参数 全文预览

1N5937P概述

Zener Diode,

1N5937P规格参数

参数名称属性值
Reach Compliance Codecompli
ECCN代码EAR99
Base Number Matches1

文档预览

下载PDF文档
1N5913BP thru 1N5956BP (Plastic)
Axial-Leaded 1.5 Watt Zener Diodes
SCOTTSDALE DIVISION
DESCRIPTION
The 1N5913-5956B series of 1.5 watt Zeners provides voltage regulation in a
selection from 3.3 to 200 volts with different tolerances as identified by suffix
letter on the part. These plastic encapsulated Zeners have moisture
classification of Level 1 with no dry pack required. They are also available in
various military screening levels by adding a prefix identifier as described in
the Features below. The plastic molded Zeners with a P suffix provide a
lower thermal resistance (junction to lead) compared to the optional glass
body (G suffix) for these same JEDEC part numbers. Both package options
are available by Microsemi. Microsemi also offers numerous other Zener
products to meet higher or lower power and test-current applications.
APPEARANCE
WWW .
Microsemi
.C
OM
DO-41 or
DO-204AL
(Plastic)
IMPORTANT:
For the most current data, consult
MICROSEMI’s
website:
http://www.microsemi.com
FEATURES
JEDEC registered 1N5913 to 1N5956B
Zener voltage available 3.3V to 200V
Standard voltage tolerances are plus/minus 5% with
B suffix and 10 % with A suffix identification
Tight tolerances available in plus or minus 2% or 1%
with C or D suffix respectively
Options for screening in accordance with MIL-PRF-
19500 for JAN, JANTX, JANTXV, and JANS are
available by adding MQ, MX, MV, or MSP prefixes
respectively to part numbers.
Surface mount equivalents available as SMBJ5913 to
SMBJ5956B or SMBG5913 to SMBG5956B
Optional glass body axial-leaded Zeners available as
1N5913BG to 1N5956BG (see separate data sheet)
APPLICATIONS / BENEFITS
Regulates voltage over a broad operating current
and temperature range
Wide selection from 3.3 to 200 V
Flexible axial-lead mounting terminals
Nonsensitive to ESD
Moisture classification is Level 1 per IPC/JEDEC
J-STD-020B with no dry pack required
Specified capacitance (see Figure 3)
MAXIMUM RATINGS
Power dissipation at 25
º
C: 1.5 watts (also see
derating in Figure 1).
Operating and Storage temperature: -65
º
C to +150
º
C
Thermal Resistance: 45
º
C/W junction to lead at 3/8
(10 mm) lead length from body, or 105
º
C/W junction
to ambient when mounted on FR4 PC board (1 oz
Cu) with 4 mm
2
copper pads and track width 1 mm,
length 25 mm
Steady-State Power: 1.5 watts at T
L
< 82.5
o
C 3/8
inch (10 mm) from body, or 1.19 watts at T
A
= 25
º
C
when mounted on FR4 PC board as described for
thermal resistance (also see Figure 1)
Forward voltage @200 mA: 1.2 volts (maximum)
Solder Temperatures: 260
º
C for 10 s (max)
MECHANICAL AND PACKAGING
CASE: Void-free transfer molded thermosetting
epoxy body meeting UL94V-0
TERMINALS: Leads, tin-lead plated solderable per
MIL-STD-750, method 2026
POLARITY: Cathode indicated by band. Diode to
be operated with the banded end positive with
respect to the opposite end for Zener regulation
MARKING: Part number
TAPE & REEL optional: Standard per EIA-296
(add “TR” suffix to part number)
WEIGHT: 0.7 grams
See package dimensions on last page
1N5913B thru 1N5956B
(Plastic)
Copyright
2003
10-13-2003 REV B
Microsemi
Scottsdale Division
8700 E. Thomas Rd. PO Box 1390, Scottsdale, AZ 85252 USA, (480) 941-6300, Fax: (480) 947-1503
Page 1
Helper2416-47——fedora 20 开发环境全攻略
本帖最后由 yuanlai2010 于 2014-10-12 14:11 编辑 fedora20 开发环境全攻略 Fedora20个性配置篇 一楼Helper2416基础开发环境篇 二楼Qt4.8开发环境篇 三楼 ......
yuanlai2010 嵌入式系统
朽而不锈看模拟应用设计
by ni_labview 看到一个文章,转载来与大家分享: 模拟设计可以老但不可以朽 安静的生活不需再起什么波澜,即将进入四十岁不再进入研发黄金时间段,想把自己做过的想过的都留下来,没 ......
绿茶 模拟电子
求LCD资料
有那位同仁有单片机控制LCD显示屏的资料,带程序及控制说明更佳,可以的话发到我邮箱:gxw144@163.com 谢谢!...
zhang124 嵌入式系统
弱问:如何实现开机自动加载dll驱动?
现在有一个设备的dll驱动,每次插入usb口都要提示输入驱动名称,所以想实现开机自动加载xxx.dll。 我把dll添加到文件夹里了,platform.bib也修改了,请问,platform.reg里应该如何写?我不清楚 ......
allkity 嵌入式系统
如何在复位时对RAM进行初始化
系统是异步复位,复位信号有效时,要将RAM中的所有值清零,复位信号结束前,要完成对RAM的复位,这样的初始化程存用Verilog代码应该怎么写啊(可综合!)????希望大家能给点意见!!!!! ......
eeleader-mcu FPGA/CPLD

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 2262  2644  1106  1219  494  56  2  7  20  59 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved