MD1213
High Speed Dual MOSFET Driver
Features
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6ns rise and fall time with 1000pF load
2.0A peak output source/sink current
1.2V to 5V input CMOS compatible
4.5V to 13V total supply voltage
Smart logic threshold
Low jitter design
Two matched channels
Outputs can swing below ground
Low inductance package
Thermally-enhanced package
General Description
The Supertex MD1213 is a high speed, dual MOSFET driver. It is
designed to drive high voltage P and N-channel MOSFET transistors
for medical ultrasound and other applications requiring a high
output current for a capacitive load. The high-speed input stage of
the MD1213 can operate from 1.2V to 5.0V logic interface with an
optimum operating input signal range of 1.8V to 3.3V. An adaptive
threshold circuit is used to set the level translator switch threshold
to the average of the input logic 0 and logic 1 levels. The input logic
levels may be ground referenced, even though the driver is putting out
bipolar signals. The level translator uses a proprietary circuit, which
provides DC coupling together with high-speed operation.
The output stage of the MD1213 has separate power connections
enabling the output signal L and H levels to be chosen independently
from the supply voltages used for the majority of the circuit. As an
example, the input logic levels may be 0 and 1.8volts, the control logic
may be powered by +5.0V and –5.0V, and the output L and H levels
may be varied anywhere over the range of –5.0V to +5.0V. The output
stage is capable of peak currents of up to ±2.0A, depending on the
supply voltages used and load capacitance present.
The OE pin serves a dual purpose. First, its logic H level is used
to compute the threshold voltage level for the channel input level
translators. Secondly, when OE is low, the outputs are disabled, with
the A output high and the B output low. This assists in properly pre-
charging the AC coupling capacitors that may be used in series in the
gate drive circuit of an external PMOS and NMOS transistor pair.
Applications
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Medical ultrasound imaging
Piezoelectric transducer drivers
Nondestructive evaluation
PIN diode driver
CCD Clock driver/buffer
High speed level translator
Typical Application Circuit
V
DD
1
OE
Level
Shifter
Level
Shifter
V
DD
2
V
H
+5V
0.47µF
IN
A
OUT
A
+100V
1µF
10nF
3.3V CMOS
Logic Inputs
V
SS
2
V
L
V
H
V
DD
2
10nF
IN
B
Level
Shifter
-100V
To Piezoelectric
Transducer
OUT
B
Supertex
TC6320
1µF
MD1213
Gnd
V
SS
1
V
SS
2
V
L
-5V
0.47µF
MD1213
Ordering Information
DEVICE
MD1213
-G indicates package is RoHS compliant (‘Green’)
Pin Configuration
Package Option
12
10
12-Lead 4x4x0.8pitch QFN
MD1213K6-G
1
9
3
7
Absolute Maximum Ratings
Parameter
V
DD
-V
SS
, logic supply voltage
V
H
, output high supply voltage
V
L
, output low supply voltage
V
SS
, low side supply voltage
Logic input levels
Maximum junction temperature
Storage temperature
Operating temperature
Value
-0.5V to +13.5V
V
L
- 0.5V to V
DD
+0.5V
V
SS
- 0.5V to V
H
+0.5V
-7.0V to +0.5V
V
SS
-0.5V to V
SS
+7.0V
+125°C
-65°C to 150°C
-20°C to 85°C
4
(top view)
6
12-Lead QFN (K6)
Package Marking
1213
YWLL
Y = Last Digit of Year Sealed
W = Code for Week Sealed
L = Lot Number
= “Green” Packaging
12-Lead QFN (K6)
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.
DC Electrical Characteristics
(Over operating conditions unless otherwise specified, V
H
= V
DD1
= V
DD2
= 12V, V
L
= V
SS1
= V
SS2
= 0V, V
OE
= 3.3V, T
J
= 25°C)
Sym
V
DD
- V
SS
V
SS
V
H
V
L
I
DD1Q
I
DD2Q
I
HQ
I
DD1
I
DD2
I
H
V
IH
V
IL
I
IH
I
IL
Parameter
Logic supply voltage
Logic side supply voltage
Output high supply voltage
Output low supply voltage
V
DD1
quiescent current
V
DD2
quiescent current
V
H
quiescent current
V
DD1
average current
V
DD2
average current
V
H
average current
Input logic voltage high
Input logic voltage low
Input logic current high
Input logic current low
Min
4.5
-5.5
V
SS
+ 2.0
V
SS
-
-
-
-
-
-
V
OE
- 0.3
0
-
-
Typ
-
-
-
-
0.55
-
-
0.88
6.6
23
-
-
-
-
Max
13
0
V
DD
V
DD
- 2.0
-
10
10
-
-
-
5.0
0.3
1.0
1.0
Units Conditions
V
V
V
V
mA
µA
µA
mA
mA
mA
V
V
µA
µA
For logic inputs IN
A
and IN
B
One channel on at 5.0Mhz,
No load
No input transitions
---
---
---
---
2
MD1213
Outputs
(V
Sym
V
IH
V
IL
R
IN
C
IN
θ
JA
θ
JC
R
SINK
R
SOURCE
I
SINK
I
SOURCE
H
= V
DD1
= V
DD2
= 12V, V
L
= V
SS1
= V
SS2
= 0V, V
OE
= 3.3V, T
J
= 25°C)
Parameter
OE Input logic voltage high
OE Input logic voltage low
Input logic impedance to GND
Logic input capacitance
Thermal resistance to air
Thermal resistance to case
Output sink resistance
Output source resistance
Peak output sink current
Peak output source current
H
Min
1.2
0
12
-
-
-
-
-
-
-
Typ
-
-
20
5.0
47
7.0
-
-
2.0
2.0
Max
5.0
0.3
30
10
-
-
12.5
12.5
-
-
Units Conditions
V
V
KΩ
pF
°C/W
°C/W
Ω
Ω
A
A
All inputs
1oz. 4-layer 3x4” PCB with thermal
pad and thermal via array
---
I
SINK
= 50mA
I
SOURCE
= 50mA
---
---
For logic input OE
AC Electrical Characteristics
(V
Sym
t
irf
t
PLH
t
PHL
t
POE
t
r
t
f
l t
r
- t
f
l
l t
PLH
-t
PHL
l
Δt
dm
Parameter
Inputs or OE rise & fall time
Propagation delay when out-
put is from low to high
Propagation delay when out-
put is from high to low
Propagation delay OE to
outputs
Output rise time
Output fall time
Rise and fall time matching
Propagation low to high and
high to low matching
Propagation delay match
= V
DD1
= V
DD2
= 12V, V
L
= V
SS1
= V
SS2
= 0V, V
OE
= 3.3V, T
J
= 25°C)
Min
-
-
-
-
-
-
-
-
-
Typ
-
7.0
7.0
9.0
6.0
6.0
1.0
1.0
±2.0
Max
10
-
-
-
-
-
-
-
-
Units Conditions
ns
ns
ns
ns
ns
ns
ns
ns
ns
For each channel
Device to device delay match
C
LOAD
= 1000pF,
see timing diagram
Input signal rise/fall time of 2ns
Logic input edge speed requirement
Logic Truth Table
Logic Inputs
OE
H
H
H
H
L
IN
A
L
L
H
H
X
IN
B
L
H
L
H
X
OUT
A
V
H
V
H
V
L
V
L
V
H
Output
OUT
B
V
H
V
L
V
H
V
L
V
L
3
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