74F11 Triple 3-Input AND Gate
May 2007
74F11
Triple 3-Input AND Gate
General Description
This device contains three independent gates, each of
which performs the logic AND function.
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Ordering Information
Order
Number
74F11SC
74F11SJ
Package
Number
M14A
M14D
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering number.
Connection Diagram
Logic Symbol
IEEE/IEC
Unit Loading/Fan Out
Pin Names
A
n
, B
n
, C
n
O
n
Description
Inputs
Outputs
U.L.
HIGH/LOW
1.0 / 1.0
50 / 33.3
Input I
IH
/I
IL
,
Output I
OH
/I
OL
20 µA / –0.6mA
–1 mA / 20 mA
©1988 Fairchild Semiconductor Corporation
74F11 Rev. 1.3
www.fairchildsemi.com
74F11 Triple 3-Input AND Gate
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
T
STG
T
A
T
J
V
CC
V
IN
I
IN
V
O
Storage Temperature
Parameter
Ambient Temperature Under Bias
Junction Temperature Under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage
(1)
Input Current
(1)
Voltage Applied to Output in HIGH State (with V
CC
= 0V)
Standard Output
3-STATE Output
Current Applied to Output in LOW State (Max.)
Rating
–65°C to +150°C
–55°C to +125°C
–55°C to +150°C
–0.5V to +7.0V
–0.5V to +7.0V
–30mA to +5.0mA
–0.5V to V
CC
–0.5V to 5.5V
twice the rated I
OL
(mA)
Note:
1. Either voltage limit or current limit is sufficient to protect inputs.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
T
A
V
CC
Supply Voltage
Parameter
Free Air Ambient Temperature
Rating
0°C to +70°C
+4.5V to +5.5V
©1988 Fairchild Semiconductor Corporation
74F11 Rev. 1.3
www.fairchildsemi.com
2
74F11 Triple 3-Input AND Gate
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
V
OL
I
IH
I
BVI
I
CEX
V
ID
I
OD
I
IL
I
OS
I
CCH
I
CCL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Current
Input HIGH Current Breakdown
Test
Output HIGH Leakage Current
Input Leakage Test
Output Leakage Circuit Current
Input LOW Current
Output Short-Circuit Current
Power Supply Current
Power Supply Current
10% V
CC
5% V
CC
10% V
CC
V
CC
Conditions
Recognized as a HIGH
Signal
Recognized as a LOW
Signal
Min.
2.0
Typ.
Max.
Units
V
0.8
–1.2
2.5
2.7
0.5
5.0
7.0
50
4.75
3.75
–0.6
–60
4.1
6.5
–150
6.2
9.7
V
V
V
V
µA
µA
µA
V
µA
mA
mA
mA
mA
Min.
Min.
Min.
Max.
Max.
Max.
0.0
0.0
Max.
Max.
Max.
Max.
I
IN
=
–18mA
I
OH
=
–1mA
I
OH
=
–1mA
I
OL
=
20mA
V
IN
=
2.7V
V
IN
=
7.0V
V
OUT
=
V
CC
I
ID
=
1.9µA, All other pins
grounded
V
IOD
=
150mV, All other
pins grounded
V
IN
=
0.5V
V
OUT
=
0V
V
O
=
HIGH
V
O
=
LOW
AC Electrical Characteristics
T
A
=
+25°C,
V
CC
=
+5.0V,
C
L
=
50pF
Symbol
t
PLH
t
PHL
T
A
–55°C to +125°C,
V
CC
=
+5.0V,
C
L
=
50pF
Min.
2.5
2.0
T
A
=
0°C to +70°C,
V
CC
=
+5.0V,
C
L
=
50pF
Min.
3.0
2.5
Parameter
Propagation Delay,
A
n
, B
n
, C
n
to O
n
Min. Typ. Max.
3.0
2.5
4.2
4.1
5.6
5.5
Max.
7.5
7.5
Max.
6.6
6.5
Units
ns
©1988 Fairchild Semiconductor Corporation
74F11 Rev. 1.3
www.fairchildsemi.com
3
74F11 Triple 3-Input AND Gate
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 1. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
©1988 Fairchild Semiconductor Corporation
74F11 Rev. 1.3
www.fairchildsemi.com
4
74F11 Triple 3-Input AND Gate
Physical Dimensions
(Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 2. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
©1988 Fairchild Semiconductor Corporation
74F11 Rev. 1.3
www.fairchildsemi.com
5
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