74LCX138
LOW VOLTAGE CMOS 3 TO 8 LINE DECODER (INV.)
WITH 5V TOLERANT INPUTS
s
s
s
s
s
s
s
s
s
s
5V TOLERANT INPUTS
HIGH SPEED :
t
PD
= 6.7ns (MAX.) at V
CC
= 3V
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN) at V
CC
= 3V
PCI BUS LEVELS GUARANTEED AT 24 mA
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 138
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
SOP
TSSOP
ORDER CODES
PACKAGE
SOP
TSSOP
TUBE
74LCX138M
T&R
74LCX138MTR
74LCX138TTR
DESCRIPTION
The 74LCX138 is a low voltage CMOS 3 TO 8
LINE DECODER (INVERTING) fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low power
and high speed 3.3V applications; it can be
interfaced to 5V signal environment for inputs.
If the device is enabled, 3 binary select inputs (A,
B and C) determine which one of the outputs will
PIN CONNECTION AND IEC LOGIC SYMBOLS
go low. If enable input G1 is held low or either G2A
or G2B is held high, the decoding function is
ihnibited and all the 8 outputs go to high.
Three enable inputs are provided to ease cascade
connection and application of address decoders
for memory systems.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
September 2001
1/9
74LCX138
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1, 2, 3
4, 5
6
15, 14, 13, 12, 11, 10, 9, 7
8
16
SYMBOL
A, B, C
G2A, G2B
G1
Y0 to Y7
GND
V
CC
NAME AND FUNCTION
Address Inputs
Enable Inputs
Enable Input
Outputs
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
INPUTS
OUTPUTS
ENABLE
G2B
X
X
H
L
L
L
L
L
L
L
L
G2A
X
H
X
L
L
L
L
L
L
L
L
G1
L
X
X
H
H
H
H
H
H
H
H
C
X
X
X
L
L
L
L
H
H
H
H
SELECT
B
X
X
X
L
L
H
H
L
L
H
H
A
X
X
X
L
H
L
H
L
H
L
H
Y0
H
H
H
L
H
H
H
H
H
H
H
Y1
H
H
H
H
L
H
H
H
H
H
H
Y2
H
H
H
H
H
L
H
H
H
H
H
Y3
H
H
H
H
H
H
L
H
H
H
H
Y4
H
H
H
H
H
H
H
L
H
H
H
Y5
H
H
H
H
H
H
H
H
L
H
H
Y6
H
H
H
H
H
H
H
H
H
L
H
Y7
H
H
H
H
H
H
H
H
H
H
L
X : Don’t Care
2/9
74LCX138
LOGIC DIAGRAM
This logic diagram has not be used to estimate propagation delays
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage (V
CC
= 0V)
DC Output Voltage (High or Low State) (note 1)
DC Input Diode Current
DC Output Diode Current (note 2)
DC Output Current
DC Supply Current per Supply Pin
DC Ground Current per Supply Pin
Storage Temperature
Lead Temperature (10 sec)
Parameter
Value
-0.5 to +7.0
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+ 0.5
- 50
- 50
±
50
±
100
±
100
-65 to +150
300
Unit
V
V
V
V
mA
mA
mA
mA
mA
°C
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) I
O
absolute maximum rating must be observed
2) V
O
< GND
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
V
O
I
OH
, I
OL
I
OH
, I
OL
T
op
dt/dv
Supply Voltage (note 1)
Input Voltage
Output Voltage (V
CC
= 0V)
Output Voltage (High or Low State)
High or Low Level Output Current (V
CC
= 3.0 to 3.6V)
High or Low Level Output Current (V
CC
= 2.7V)
Operating Temperature
Input Rise and Fall Time (note 2)
Parameter
Value
2.0 to 3.6
0 to 5.5
0 to 5.5
0 to V
CC
±
24
±
12
-55 to 125
0 to 10
Unit
V
V
V
V
mA
mA
°C
ns/V
1) Truth Table guaranteed: 1.5V to 3.6V
2) V
IN
from 0.8V to 2V at V
CC
= 3.0V
3/9
74LCX138
DC SPECIFICATIONS
Test Condition
Symbol
Parameter
V
CC
(V)
-40 to 85
°C
Min.
2.0
2.7 to 3.6
0.8
2.7 to 3.6
2.7
3.0
V
OL
Low Level Output
Voltage
2.7 to 3.6
2.7
3.0
I
I
I
off
I
CC
∆I
CC
Input Leakage
Current
Power Off Leakage
Current
Quiescent Supply
Current
I
CC
incr. per Input
2.7 to 3.6
0
2.7 to 3.6
2.7 to 3.6
I
O
=-100
µA
I
O
=-12 mA
I
O
=-18 mA
I
O
=-24 mA
I
O
=100
µA
I
O
=12 mA
I
O
=16 mA
I
O
=24 mA
V
I
= 0 to 5.5V
V
I
or V
O
= 5.5V
V
I
= V
CC
or GND
V
I
or V
O
= 3.6 to 5.5V
V
IH
= V
CC
- 0.6V
V
CC
-0.2
2.2
2.4
2.2
0.2
0.4
0.4
0.55
±
5
10
10
±
10
500
V
CC
-0.2
2.2
2.4
2.2
0.2
0.4
0.4
0.55
±
5
10
10
±
10
500
µA
µA
µA
µA
V
V
0.8
V
Max.
Value
-55 to 125
°C
Min.
2.0
Max.
V
Unit
V
IH
V
IL
V
OH
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
DYNAMIC SWITCHING CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
3.3
C
L
= 50pF
V
IL
= 0V, V
IH
= 3.3V
Value
T
A
= 25
°C
Min.
Typ.
0.8
-0.8
Max.
V
Unit
V
OLP
V
OLV
Dynamic Low Level Quiet
Output (note 1)
1) Number of outputs defined as ”n”. Measured with ”n-1” outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is
measured in the LOW state.
4/9
74LCX138
AC ELECTRICAL CHARACTERISTICS
Test Conditi on
Symbol
Parameter
V
CC
(V)
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
3.0 to 3.6
C
L
(pF)
50
50
50
50
R
L
(Ω)
500
500
500
500
t
s
=
t
r
(ns)
2.5
2.5
2.5
2.5
-40 to 85
°C
Min.
1.5
1.5
1.5
Max.
7.9
6.7
6.4
5.8
7.4
6.5
1.0
Value
-55 to 125
°C
Min.
1.5
1.5
1.5
Max.
7.9
6.7
6.4
5.8
7.4
6.5
1.0
ns
ns
ns
ns
Unit
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
OSLH
t
OSHL
Propagation Delay
Time A, B, C to Y
Propagation Delay
Time G1 to Y
Propagation Delay
Time G2 to Y
Output To Output
Skew Time (note1,
2)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t
OSLH
= | t
PLHm
- t
PLHn
|, t
OSHL
= | t
PHLm
- t
PHLn
|)
2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
3.3
3.3
V
IN
= 0 to V
CC
f
IN
= 10MHz
V
IN
= 0 or V
CC
Value
T
A
= 25
°C
Min.
Typ.
6
42
Max.
pF
pF
Unit
C
IN
C
PD
Input Capacitance
Power Dissipation Capacitance
(note 1)
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
TEST CIRCUIT
C
L
= 50pF or equivalent (includes jig and probe capacitance)
R
L
= 500Ω or equivalent
R
T
= Z
OUT
of pulse generator (typically 50Ω)
5/9
微控制器 MCU
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